JPS51116630A - Clock control system for memory device - Google Patents

Clock control system for memory device

Info

Publication number
JPS51116630A
JPS51116630A JP50041449A JP4144975A JPS51116630A JP S51116630 A JPS51116630 A JP S51116630A JP 50041449 A JP50041449 A JP 50041449A JP 4144975 A JP4144975 A JP 4144975A JP S51116630 A JPS51116630 A JP S51116630A
Authority
JP
Japan
Prior art keywords
memory device
control system
clock control
absorb
delivery
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50041449A
Other languages
Japanese (ja)
Other versions
JPS5612904B2 (en
Inventor
Eikichi Ota
Shigeki Furuta
Masateru Tagami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP50041449A priority Critical patent/JPS51116630A/en
Publication of JPS51116630A publication Critical patent/JPS51116630A/en
Publication of JPS5612904B2 publication Critical patent/JPS5612904B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To absorb a time difference between data reception and delivery in a memory device.
COPYRIGHT: (C)1976,JPO&Japio
JP50041449A 1975-04-04 1975-04-04 Clock control system for memory device Granted JPS51116630A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50041449A JPS51116630A (en) 1975-04-04 1975-04-04 Clock control system for memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50041449A JPS51116630A (en) 1975-04-04 1975-04-04 Clock control system for memory device

Publications (2)

Publication Number Publication Date
JPS51116630A true JPS51116630A (en) 1976-10-14
JPS5612904B2 JPS5612904B2 (en) 1981-03-25

Family

ID=12608672

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50041449A Granted JPS51116630A (en) 1975-04-04 1975-04-04 Clock control system for memory device

Country Status (1)

Country Link
JP (1) JPS51116630A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5856450U (en) * 1981-10-12 1983-04-16 富士電機株式会社 Cooling body for semiconductor rectifier

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5856450U (en) * 1981-10-12 1983-04-16 富士電機株式会社 Cooling body for semiconductor rectifier

Also Published As

Publication number Publication date
JPS5612904B2 (en) 1981-03-25

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