JPS51118390A - Multi layer wiring unig - Google Patents

Multi layer wiring unig

Info

Publication number
JPS51118390A
JPS51118390A JP50043202A JP4320275A JPS51118390A JP S51118390 A JPS51118390 A JP S51118390A JP 50043202 A JP50043202 A JP 50043202A JP 4320275 A JP4320275 A JP 4320275A JP S51118390 A JPS51118390 A JP S51118390A
Authority
JP
Japan
Prior art keywords
unig
layer wiring
multi layer
wiring
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50043202A
Other languages
Japanese (ja)
Inventor
Takeshi Kimura
Shigeru Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP50043202A priority Critical patent/JPS51118390A/en
Publication of JPS51118390A publication Critical patent/JPS51118390A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To get wiring unit with high reliability by improving adhesion between wiring layer isolating film and metal wiring conductor layer in thin film integrated circuit.
JP50043202A 1975-04-11 1975-04-11 Multi layer wiring unig Pending JPS51118390A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50043202A JPS51118390A (en) 1975-04-11 1975-04-11 Multi layer wiring unig

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50043202A JPS51118390A (en) 1975-04-11 1975-04-11 Multi layer wiring unig

Publications (1)

Publication Number Publication Date
JPS51118390A true JPS51118390A (en) 1976-10-18

Family

ID=12657333

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50043202A Pending JPS51118390A (en) 1975-04-11 1975-04-11 Multi layer wiring unig

Country Status (1)

Country Link
JP (1) JPS51118390A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5917266A (en) * 1982-07-21 1984-01-28 Hitachi Ltd Resin-encapsulated semiconductor device
US5200026A (en) * 1990-05-18 1993-04-06 International Business Machines Corporation Manufacturing method for multi-layer circuit boards
US7611982B2 (en) 2003-04-15 2009-11-03 Tdk Corporation Method of forming sheet having foreign material portions used for forming multi-layer wiring board and sheet having foreign portions

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5917266A (en) * 1982-07-21 1984-01-28 Hitachi Ltd Resin-encapsulated semiconductor device
US5200026A (en) * 1990-05-18 1993-04-06 International Business Machines Corporation Manufacturing method for multi-layer circuit boards
US7611982B2 (en) 2003-04-15 2009-11-03 Tdk Corporation Method of forming sheet having foreign material portions used for forming multi-layer wiring board and sheet having foreign portions

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