JPS51150974A - Manufacture process for a semiconductor device - Google Patents
Manufacture process for a semiconductor deviceInfo
- Publication number
- JPS51150974A JPS51150974A JP50074906A JP7490675A JPS51150974A JP S51150974 A JPS51150974 A JP S51150974A JP 50074906 A JP50074906 A JP 50074906A JP 7490675 A JP7490675 A JP 7490675A JP S51150974 A JPS51150974 A JP S51150974A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- manufacture process
- comporatively
- divice
- make
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
- H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Wire Bonding (AREA)
Abstract
PURPOSE: To make a high reliable semi conductor divice which has a simple mechanism comporatively.
COPYRIGHT: (C)1976,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50074906A JPS51150974A (en) | 1975-06-19 | 1975-06-19 | Manufacture process for a semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50074906A JPS51150974A (en) | 1975-06-19 | 1975-06-19 | Manufacture process for a semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS51150974A true JPS51150974A (en) | 1976-12-24 |
Family
ID=13560889
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP50074906A Pending JPS51150974A (en) | 1975-06-19 | 1975-06-19 | Manufacture process for a semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS51150974A (en) |
-
1975
- 1975-06-19 JP JP50074906A patent/JPS51150974A/en active Pending
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