JPS5124113A - Deijitarudeetatsushinhoshiki - Google Patents

Deijitarudeetatsushinhoshiki

Info

Publication number
JPS5124113A
JPS5124113A JP50054432A JP5443275A JPS5124113A JP S5124113 A JPS5124113 A JP S5124113A JP 50054432 A JP50054432 A JP 50054432A JP 5443275 A JP5443275 A JP 5443275A JP S5124113 A JPS5124113 A JP S5124113A
Authority
JP
Japan
Prior art keywords
deijitarudeetatsushinhoshiki
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50054432A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5734694B2 (fr
Inventor
Jesotsupu Ansonii
Richaado Dauson Jon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Standard Electric Corp
Original Assignee
International Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Standard Electric Corp filed Critical International Standard Electric Corp
Publication of JPS5124113A publication Critical patent/JPS5124113A/ja
Publication of JPS5734694B2 publication Critical patent/JPS5734694B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/07—Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP50054432A 1974-05-07 1975-05-07 Deijitarudeetatsushinhoshiki Granted JPS5124113A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2003574A GB1464928A (en) 1974-05-07 1974-05-07 Digital multiplexing

Publications (2)

Publication Number Publication Date
JPS5124113A true JPS5124113A (ja) 1976-02-26
JPS5734694B2 JPS5734694B2 (fr) 1982-07-24

Family

ID=10139291

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50054432A Granted JPS5124113A (ja) 1974-05-07 1975-05-07 Deijitarudeetatsushinhoshiki

Country Status (5)

Country Link
JP (1) JPS5124113A (fr)
AU (1) AU8078475A (fr)
CA (1) CA1048178A (fr)
ES (1) ES437456A1 (fr)
GB (1) GB1464928A (fr)

Also Published As

Publication number Publication date
CA1048178A (fr) 1979-02-06
GB1464928A (en) 1977-02-16
AU8078475A (en) 1976-11-04
ES437456A1 (es) 1976-12-01
JPS5734694B2 (fr) 1982-07-24

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