JPS52120652A - Synchronous type delay circuit - Google Patents

Synchronous type delay circuit

Info

Publication number
JPS52120652A
JPS52120652A JP3747876A JP3747876A JPS52120652A JP S52120652 A JPS52120652 A JP S52120652A JP 3747876 A JP3747876 A JP 3747876A JP 3747876 A JP3747876 A JP 3747876A JP S52120652 A JPS52120652 A JP S52120652A
Authority
JP
Japan
Prior art keywords
delay circuit
synchronous type
type delay
front edge
coincididng
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3747876A
Other languages
Japanese (ja)
Other versions
JPS601775B2 (en
Inventor
Takafumi Okada
Akira Yamakoshi
Kiyonori Tominaga
Shoji Omori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP51037478A priority Critical patent/JPS601775B2/en
Publication of JPS52120652A publication Critical patent/JPS52120652A/en
Publication of JPS601775B2 publication Critical patent/JPS601775B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electronic Switches (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

PURPOSE:To realize the delay circuit easily obtainable for the rectangular signal coincididng the front edge to that of the trigger pulse and also coinciding the trailing edge to the front edge of another pulse immediately after a constant time than this, by only additing a few circuits to monostable multivibrator.
JP51037478A 1976-04-02 1976-04-02 Synchronous delay circuit Expired JPS601775B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP51037478A JPS601775B2 (en) 1976-04-02 1976-04-02 Synchronous delay circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP51037478A JPS601775B2 (en) 1976-04-02 1976-04-02 Synchronous delay circuit

Publications (2)

Publication Number Publication Date
JPS52120652A true JPS52120652A (en) 1977-10-11
JPS601775B2 JPS601775B2 (en) 1985-01-17

Family

ID=12498618

Family Applications (1)

Application Number Title Priority Date Filing Date
JP51037478A Expired JPS601775B2 (en) 1976-04-02 1976-04-02 Synchronous delay circuit

Country Status (1)

Country Link
JP (1) JPS601775B2 (en)

Also Published As

Publication number Publication date
JPS601775B2 (en) 1985-01-17

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