JPS5219925A - Memory unit - Google Patents
Memory unitInfo
- Publication number
- JPS5219925A JPS5219925A JP50096522A JP9652275A JPS5219925A JP S5219925 A JPS5219925 A JP S5219925A JP 50096522 A JP50096522 A JP 50096522A JP 9652275 A JP9652275 A JP 9652275A JP S5219925 A JPS5219925 A JP S5219925A
- Authority
- JP
- Japan
- Prior art keywords
- memory unit
- memory
- circuit
- memory circuits
- control circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Static Random-Access Memory (AREA)
- Hardware Redundancy (AREA)
Abstract
PURPOSE: To provide a control circuit that selects and automatically transmits control signals required for each memory circuit by offering discrimination signal from memory circuits included in the memory unit to specify the memory circuits to be driven and by detecting the signals with a discrimination circuit in the control circuit, when driving several memory circuits.
COPYRIGHT: (C)1977,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50096522A JPS589510B2 (en) | 1975-08-08 | 1975-08-08 | Kiokusouchi |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50096522A JPS589510B2 (en) | 1975-08-08 | 1975-08-08 | Kiokusouchi |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5219925A true JPS5219925A (en) | 1977-02-15 |
| JPS589510B2 JPS589510B2 (en) | 1983-02-21 |
Family
ID=14167459
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP50096522A Expired JPS589510B2 (en) | 1975-08-08 | 1975-08-08 | Kiokusouchi |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS589510B2 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5744277A (en) * | 1980-08-29 | 1982-03-12 | Sharp Corp | Information processor |
| JPS58111168A (en) * | 1981-12-25 | 1983-07-02 | Canon Inc | Information transmitting device |
| JPS58139228A (en) * | 1982-02-10 | 1983-08-18 | Nec Corp | Controlling system of interface of peripheral device |
| JPS6188350A (en) * | 1985-10-04 | 1986-05-06 | Canon Inc | external storage device |
| JPS61180990A (en) * | 1985-10-25 | 1986-08-13 | Nec Corp | Semiconductor device |
| JPS62276643A (en) * | 1986-05-26 | 1987-12-01 | Fujitsu Ltd | Memory control method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4878836A (en) * | 1971-12-30 | 1973-10-23 | ||
| JPS4934741A (en) * | 1972-07-31 | 1974-03-30 | ||
| JPS5086940A (en) * | 1973-12-03 | 1975-07-12 |
-
1975
- 1975-08-08 JP JP50096522A patent/JPS589510B2/en not_active Expired
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4878836A (en) * | 1971-12-30 | 1973-10-23 | ||
| JPS4934741A (en) * | 1972-07-31 | 1974-03-30 | ||
| JPS5086940A (en) * | 1973-12-03 | 1975-07-12 |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5744277A (en) * | 1980-08-29 | 1982-03-12 | Sharp Corp | Information processor |
| JPS58111168A (en) * | 1981-12-25 | 1983-07-02 | Canon Inc | Information transmitting device |
| JPS58139228A (en) * | 1982-02-10 | 1983-08-18 | Nec Corp | Controlling system of interface of peripheral device |
| JPS6188350A (en) * | 1985-10-04 | 1986-05-06 | Canon Inc | external storage device |
| JPS61180990A (en) * | 1985-10-25 | 1986-08-13 | Nec Corp | Semiconductor device |
| JPS62276643A (en) * | 1986-05-26 | 1987-12-01 | Fujitsu Ltd | Memory control method |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS589510B2 (en) | 1983-02-21 |
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