JPS524153A - Pull-in circuit - Google Patents

Pull-in circuit

Info

Publication number
JPS524153A
JPS524153A JP50080262A JP8026275A JPS524153A JP S524153 A JPS524153 A JP S524153A JP 50080262 A JP50080262 A JP 50080262A JP 8026275 A JP8026275 A JP 8026275A JP S524153 A JPS524153 A JP S524153A
Authority
JP
Japan
Prior art keywords
circuit
pull
amplifier
combine
frequency range
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50080262A
Other languages
Japanese (ja)
Inventor
Kazuo Ogawa
Hideki Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP50080262A priority Critical patent/JPS524153A/en
Publication of JPS524153A publication Critical patent/JPS524153A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/101—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using an additional control signal to the controlled loop oscillator derived from a signal generated in the loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To combine the amplifier/oscillator unit including a positive feedback circuit with the phase synchronous circuit via the synchronism detection circuit in order to obtain a stable pull-in circuit of a large frequency range.
JP50080262A 1975-06-27 1975-06-27 Pull-in circuit Pending JPS524153A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50080262A JPS524153A (en) 1975-06-27 1975-06-27 Pull-in circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50080262A JPS524153A (en) 1975-06-27 1975-06-27 Pull-in circuit

Publications (1)

Publication Number Publication Date
JPS524153A true JPS524153A (en) 1977-01-13

Family

ID=13713389

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50080262A Pending JPS524153A (en) 1975-06-27 1975-06-27 Pull-in circuit

Country Status (1)

Country Link
JP (1) JPS524153A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56125119A (en) * 1980-03-07 1981-10-01 Fujitsu Ltd Microwave phase synchronizing oscillator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56125119A (en) * 1980-03-07 1981-10-01 Fujitsu Ltd Microwave phase synchronizing oscillator

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