JPS5247334A - Memory control system - Google Patents

Memory control system

Info

Publication number
JPS5247334A
JPS5247334A JP12311675A JP12311675A JPS5247334A JP S5247334 A JPS5247334 A JP S5247334A JP 12311675 A JP12311675 A JP 12311675A JP 12311675 A JP12311675 A JP 12311675A JP S5247334 A JPS5247334 A JP S5247334A
Authority
JP
Japan
Prior art keywords
control system
memory control
time
answer data
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12311675A
Other languages
Japanese (ja)
Other versions
JPS5736612B2 (en
Inventor
Tetsuo Urushibara
Yoshitaka Ito
Noboru Mochizuki
Kiyoshi Minemura
Akio Shoda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Oki Electric Industry Co Ltd
NTT Inc
Original Assignee
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP12311675A priority Critical patent/JPS5247334A/en
Publication of JPS5247334A publication Critical patent/JPS5247334A/en
Publication of JPS5736612B2 publication Critical patent/JPS5736612B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: The answer data sampling timing is produced by presuming arriving time of answer data in order to perform access with minimum access time to each memory with effective operation in terms of time.
COPYRIGHT: (C)1977,JPO&Japio
JP12311675A 1975-10-13 1975-10-13 Memory control system Granted JPS5247334A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12311675A JPS5247334A (en) 1975-10-13 1975-10-13 Memory control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12311675A JPS5247334A (en) 1975-10-13 1975-10-13 Memory control system

Publications (2)

Publication Number Publication Date
JPS5247334A true JPS5247334A (en) 1977-04-15
JPS5736612B2 JPS5736612B2 (en) 1982-08-05

Family

ID=14852566

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12311675A Granted JPS5247334A (en) 1975-10-13 1975-10-13 Memory control system

Country Status (1)

Country Link
JP (1) JPS5247334A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5429530A (en) * 1977-08-10 1979-03-05 Oki Electric Ind Co Ltd Memory control system
JPS5439538A (en) * 1977-04-20 1979-03-27 Int Computers Ltd Data processor
JPS6345662A (en) * 1986-08-13 1988-02-26 Hitachi Ltd Bus control method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4917938A (en) * 1972-04-06 1974-02-16
JPS50108845A (en) * 1974-02-01 1975-08-27

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4917938A (en) * 1972-04-06 1974-02-16
JPS50108845A (en) * 1974-02-01 1975-08-27

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5439538A (en) * 1977-04-20 1979-03-27 Int Computers Ltd Data processor
JPS5429530A (en) * 1977-08-10 1979-03-05 Oki Electric Ind Co Ltd Memory control system
JPS6345662A (en) * 1986-08-13 1988-02-26 Hitachi Ltd Bus control method

Also Published As

Publication number Publication date
JPS5736612B2 (en) 1982-08-05

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