JPS524745A - Testing method for semiconductor memory device - Google Patents

Testing method for semiconductor memory device

Info

Publication number
JPS524745A
JPS524745A JP50081178A JP8117875A JPS524745A JP S524745 A JPS524745 A JP S524745A JP 50081178 A JP50081178 A JP 50081178A JP 8117875 A JP8117875 A JP 8117875A JP S524745 A JPS524745 A JP S524745A
Authority
JP
Japan
Prior art keywords
memory device
semiconductor memory
testing method
addresses
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50081178A
Other languages
Japanese (ja)
Other versions
JPS5648920B2 (en
Inventor
Junichi Mogi
Kiyoshi Miyasaka
Takeo Tatematsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP50081178A priority Critical patent/JPS524745A/en
Publication of JPS524745A publication Critical patent/JPS524745A/en
Publication of JPS5648920B2 publication Critical patent/JPS5648920B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor

Landscapes

  • Static Random-Access Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

PURPOSE:To reduce test time by arranging line addresses and column addresses of memory address and tester address alternately.
JP50081178A 1975-06-30 1975-06-30 Testing method for semiconductor memory device Granted JPS524745A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50081178A JPS524745A (en) 1975-06-30 1975-06-30 Testing method for semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50081178A JPS524745A (en) 1975-06-30 1975-06-30 Testing method for semiconductor memory device

Publications (2)

Publication Number Publication Date
JPS524745A true JPS524745A (en) 1977-01-14
JPS5648920B2 JPS5648920B2 (en) 1981-11-18

Family

ID=13739200

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50081178A Granted JPS524745A (en) 1975-06-30 1975-06-30 Testing method for semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS524745A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2501404A1 (en) * 1980-12-22 1982-09-10 Fairchild Camera Instr Co METHOD AND DEVICE FOR ADDRESSING A RANDOM ACCESS MEMORY

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2501404A1 (en) * 1980-12-22 1982-09-10 Fairchild Camera Instr Co METHOD AND DEVICE FOR ADDRESSING A RANDOM ACCESS MEMORY

Also Published As

Publication number Publication date
JPS5648920B2 (en) 1981-11-18

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