JPS5255465A - Inverter circuit - Google Patents

Inverter circuit

Info

Publication number
JPS5255465A
JPS5255465A JP50130536A JP13053675A JPS5255465A JP S5255465 A JPS5255465 A JP S5255465A JP 50130536 A JP50130536 A JP 50130536A JP 13053675 A JP13053675 A JP 13053675A JP S5255465 A JPS5255465 A JP S5255465A
Authority
JP
Japan
Prior art keywords
inverter circuit
signal phi1
phi2
lowered
takes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50130536A
Other languages
Japanese (ja)
Other versions
JPS5522977B2 (en
Inventor
Akira Ishida
Takeshi Takeya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP50130536A priority Critical patent/JPS5255465A/en
Publication of JPS5255465A publication Critical patent/JPS5255465A/en
Publication of JPS5522977B2 publication Critical patent/JPS5522977B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01728—Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals
    • H03K19/01735—Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals by bootstrapping, i.e. by positive feed-back

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:The inverter circuit which is controlled by clock signal phi1 and phi2 is used. Signal phi1 takes 1. In this way, the power consumption is lowered, at the same time ensuring high response capability.
JP50130536A 1975-10-31 1975-10-31 Inverter circuit Granted JPS5255465A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50130536A JPS5255465A (en) 1975-10-31 1975-10-31 Inverter circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50130536A JPS5255465A (en) 1975-10-31 1975-10-31 Inverter circuit

Publications (2)

Publication Number Publication Date
JPS5255465A true JPS5255465A (en) 1977-05-06
JPS5522977B2 JPS5522977B2 (en) 1980-06-20

Family

ID=15036627

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50130536A Granted JPS5255465A (en) 1975-10-31 1975-10-31 Inverter circuit

Country Status (1)

Country Link
JP (1) JPS5255465A (en)

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
IBM TECHNICAL DISCLOSURE BULLETIN#V14#N4=1971 *

Also Published As

Publication number Publication date
JPS5522977B2 (en) 1980-06-20

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