Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu LtdfiledCriticalFujitsu Ltd
Priority to JP50153699ApriorityCriticalpatent/JPS5276830A/en
Publication of JPS5276830ApublicationCriticalpatent/JPS5276830A/en
PURPOSE:A sampling clock pulse is made to be generated around the center of the 'read' data to effect a dual level sense check effectively, so that the number of 'read' errors can be reduced.
JP50153699A1975-12-231975-12-23Information reading control system
PendingJPS5276830A
(en)