JPS5278331A - Full adder - Google Patents

Full adder

Info

Publication number
JPS5278331A
JPS5278331A JP15542175A JP15542175A JPS5278331A JP S5278331 A JPS5278331 A JP S5278331A JP 15542175 A JP15542175 A JP 15542175A JP 15542175 A JP15542175 A JP 15542175A JP S5278331 A JPS5278331 A JP S5278331A
Authority
JP
Japan
Prior art keywords
full adder
pair
output
pairs
performs computation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15542175A
Other languages
Japanese (ja)
Inventor
Keiki Kojima
Imio Fudemoto
Masao Yamazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15542175A priority Critical patent/JPS5278331A/en
Publication of JPS5278331A publication Critical patent/JPS5278331A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/607—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers number-of-ones counters, i.e. devices for counting the number of input lines set to ONE among a plurality of input lines, also called bit counters or parallel counters

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Physics (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)

Abstract

PURPOSE:To obtain full adder, which contains half adder circuit group which performs computation with every pair for L-units of 1-bit data against every 2 pairs plus half adder circuit group which performs computation with every pair against every 2 pairs for the output which features the same 1 st rank among each circuit output.
JP15542175A 1975-12-25 1975-12-25 Full adder Pending JPS5278331A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15542175A JPS5278331A (en) 1975-12-25 1975-12-25 Full adder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15542175A JPS5278331A (en) 1975-12-25 1975-12-25 Full adder

Publications (1)

Publication Number Publication Date
JPS5278331A true JPS5278331A (en) 1977-07-01

Family

ID=15605622

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15542175A Pending JPS5278331A (en) 1975-12-25 1975-12-25 Full adder

Country Status (1)

Country Link
JP (1) JPS5278331A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6096014A (en) * 1983-10-31 1985-05-29 Nippon Telegr & Teleph Corp <Ntt> Transversal filter

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
IBM TECHNICAL DISCLOSURE BULLETIN#V13#N8=1971 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6096014A (en) * 1983-10-31 1985-05-29 Nippon Telegr & Teleph Corp <Ntt> Transversal filter

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