JPS5296842A - Delay circuit - Google Patents

Delay circuit

Info

Publication number
JPS5296842A
JPS5296842A JP1347176A JP1347176A JPS5296842A JP S5296842 A JPS5296842 A JP S5296842A JP 1347176 A JP1347176 A JP 1347176A JP 1347176 A JP1347176 A JP 1347176A JP S5296842 A JPS5296842 A JP S5296842A
Authority
JP
Japan
Prior art keywords
delay circuit
saving
carrier
ratio
improve
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1347176A
Other languages
Japanese (ja)
Other versions
JPS5841708B2 (en
Inventor
Susumu Tsujihara
Katsuhiko Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP51013471A priority Critical patent/JPS5841708B2/en
Publication of JPS5296842A publication Critical patent/JPS5296842A/en
Publication of JPS5841708B2 publication Critical patent/JPS5841708B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C1/00—Amplitude modulation
    • H03C1/52—Modulators in which carrier or one sideband is wholly or partially suppressed
    • H03C1/54—Balanced modulators, e.g. bridge type, ring type or double balanced type

Landscapes

  • Picture Signal Circuits (AREA)
  • Amplitude Modulation (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)

Abstract

PURPOSE:To improve S/N ratio, by saving the dynamic range of delay line driving band amplifier and by making negative modulation for the carrier.
JP51013471A 1976-02-09 1976-02-09 delay circuit Expired JPS5841708B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP51013471A JPS5841708B2 (en) 1976-02-09 1976-02-09 delay circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP51013471A JPS5841708B2 (en) 1976-02-09 1976-02-09 delay circuit

Publications (2)

Publication Number Publication Date
JPS5296842A true JPS5296842A (en) 1977-08-15
JPS5841708B2 JPS5841708B2 (en) 1983-09-13

Family

ID=11834038

Family Applications (1)

Application Number Title Priority Date Filing Date
JP51013471A Expired JPS5841708B2 (en) 1976-02-09 1976-02-09 delay circuit

Country Status (1)

Country Link
JP (1) JPS5841708B2 (en)

Also Published As

Publication number Publication date
JPS5841708B2 (en) 1983-09-13

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