JPS5353230A - Memory reading system for computer - Google Patents

Memory reading system for computer

Info

Publication number
JPS5353230A
JPS5353230A JP12808676A JP12808676A JPS5353230A JP S5353230 A JPS5353230 A JP S5353230A JP 12808676 A JP12808676 A JP 12808676A JP 12808676 A JP12808676 A JP 12808676A JP S5353230 A JPS5353230 A JP S5353230A
Authority
JP
Japan
Prior art keywords
computer
reading system
memory reading
access
machine cycle
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12808676A
Other languages
Japanese (ja)
Inventor
Tokuo Matsushita
Mitsuo Saijo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12808676A priority Critical patent/JPS5353230A/en
Publication of JPS5353230A publication Critical patent/JPS5353230A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Landscapes

  • Memory System (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE:To eliminate the necessity in that the access never fails to synchronize with a machine cycle in case the access is continuous to the memory sent from a computer by adding a means to the relation between the machine cycle and the access. Thus, the process time can be reduced.
JP12808676A 1976-10-25 1976-10-25 Memory reading system for computer Pending JPS5353230A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12808676A JPS5353230A (en) 1976-10-25 1976-10-25 Memory reading system for computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12808676A JPS5353230A (en) 1976-10-25 1976-10-25 Memory reading system for computer

Publications (1)

Publication Number Publication Date
JPS5353230A true JPS5353230A (en) 1978-05-15

Family

ID=14976048

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12808676A Pending JPS5353230A (en) 1976-10-25 1976-10-25 Memory reading system for computer

Country Status (1)

Country Link
JP (1) JPS5353230A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5798958A (en) * 1980-12-10 1982-06-19 Nec Corp Helix type delay wave circuit
JPS58144269A (en) * 1982-02-22 1983-08-27 Nec Corp Memory access system
JP2007094835A (en) * 2005-09-29 2007-04-12 Nec Electronics Corp Memory controller

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5798958A (en) * 1980-12-10 1982-06-19 Nec Corp Helix type delay wave circuit
JPS58144269A (en) * 1982-02-22 1983-08-27 Nec Corp Memory access system
JP2007094835A (en) * 2005-09-29 2007-04-12 Nec Electronics Corp Memory controller

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