JPS5360185A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5360185A
JPS5360185A JP13469776A JP13469776A JPS5360185A JP S5360185 A JPS5360185 A JP S5360185A JP 13469776 A JP13469776 A JP 13469776A JP 13469776 A JP13469776 A JP 13469776A JP S5360185 A JPS5360185 A JP S5360185A
Authority
JP
Japan
Prior art keywords
semiconductor device
density
improving
delay time
logic circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13469776A
Other languages
Japanese (ja)
Inventor
Tetsuya Iizuka
Fujio Masuoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP13469776A priority Critical patent/JPS5360185A/en
Publication of JPS5360185A publication Critical patent/JPS5360185A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65—Integrated injection logic
    • H10D84/652—Integrated injection logic using vertical injector structures

Landscapes

  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

PURPOSE:To make logic circuits integrated with bipolar transistors higher in density by improving the speed power product in a low power concentration region and minimizing delay time.
JP13469776A 1976-11-11 1976-11-11 Semiconductor device Pending JPS5360185A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13469776A JPS5360185A (en) 1976-11-11 1976-11-11 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13469776A JPS5360185A (en) 1976-11-11 1976-11-11 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5360185A true JPS5360185A (en) 1978-05-30

Family

ID=15134471

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13469776A Pending JPS5360185A (en) 1976-11-11 1976-11-11 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5360185A (en)

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