JPS5360550A - Circuit for correcting pulse duration - Google Patents
Circuit for correcting pulse durationInfo
- Publication number
- JPS5360550A JPS5360550A JP12157577A JP12157577A JPS5360550A JP S5360550 A JPS5360550 A JP S5360550A JP 12157577 A JP12157577 A JP 12157577A JP 12157577 A JP12157577 A JP 12157577A JP S5360550 A JPS5360550 A JP S5360550A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- pulse duration
- correcting pulse
- correcting
- duration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/156—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
- H03K5/1565—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern the output pulses having a constant duty cycle
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M1/00—Substation equipment, e.g. for use by subscribers
- H04M1/26—Devices for calling a subscriber
- H04M1/30—Devices which can set up and transmit only one digit at a time
- H04M1/31—Devices which can set up and transmit only one digit at a time by interrupting current to generate trains of pulses; by periodically opening and closing contacts to generate trains of pulses
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q1/00—Details of selecting apparatus or arrangements
- H04Q1/18—Electrical details
- H04Q1/30—Signalling arrangements; Manipulation of signalling currents
- H04Q1/32—Signalling arrangements; Manipulation of signalling currents using trains of DC pulses
- H04Q1/36—Pulse-correcting arrangements, e.g. for reducing effects due to interference
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Manipulation Of Pulses (AREA)
- Networks Using Active Elements (AREA)
- Pulse Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA265,382A CA1048184A (en) | 1976-11-10 | 1976-11-10 | Pulse duration correction circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5360550A true JPS5360550A (en) | 1978-05-31 |
Family
ID=4107240
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12157577A Pending JPS5360550A (en) | 1976-11-10 | 1977-10-12 | Circuit for correcting pulse duration |
Country Status (8)
| Country | Link |
|---|---|
| JP (1) | JPS5360550A (it) |
| CA (1) | CA1048184A (it) |
| DE (1) | DE2741843A1 (it) |
| FR (1) | FR2371092A1 (it) |
| GB (1) | GB1592770A (it) |
| IT (1) | IT1087728B (it) |
| NL (1) | NL7710179A (it) |
| SE (1) | SE7712747L (it) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6051988A (en) * | 1997-10-07 | 2000-04-18 | Fujitsu Limited | Pulse width controlling logic circuit |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2438380A1 (fr) * | 1978-10-06 | 1980-04-30 | Trt Telecom Radio Electr | Dispositif pour fournir un signal logique avec un rapport cyclique proche de 0,5 a partir d'un signal logique ayant un rapport cyclique quelconque |
| US4839920A (en) * | 1985-09-30 | 1989-06-13 | Siemens Aktiengesellschaft | Method for determining telephone dial pulse parameters independently of subscriber line length |
| JPS63290046A (ja) * | 1987-05-21 | 1988-11-28 | Pioneer Electronic Corp | パルス幅ひずみ補正回路 |
| CA1270585A (en) * | 1987-06-19 | 1990-06-19 | Brent Lawrence Kizuik | Rotary dial pulse receiver |
| US5227671A (en) * | 1992-04-14 | 1993-07-13 | Quantum Corporation | Circuit providing equalized duty cycle output |
-
1976
- 1976-11-10 CA CA265,382A patent/CA1048184A/en not_active Expired
-
1977
- 1977-09-09 GB GB37752/77A patent/GB1592770A/en not_active Expired
- 1977-09-16 NL NL7710179A patent/NL7710179A/xx unknown
- 1977-09-16 DE DE19772741843 patent/DE2741843A1/de active Pending
- 1977-10-03 IT IT28224/77A patent/IT1087728B/it active
- 1977-10-12 JP JP12157577A patent/JPS5360550A/ja active Pending
- 1977-11-09 FR FR7733797A patent/FR2371092A1/fr not_active Withdrawn
- 1977-11-10 SE SE7712747A patent/SE7712747L/xx unknown
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6051988A (en) * | 1997-10-07 | 2000-04-18 | Fujitsu Limited | Pulse width controlling logic circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CA1048184A (en) | 1979-02-06 |
| SE7712747L (sv) | 1978-05-11 |
| FR2371092A1 (fr) | 1978-06-09 |
| NL7710179A (nl) | 1978-05-12 |
| DE2741843A1 (de) | 1978-05-11 |
| GB1592770A (en) | 1981-07-08 |
| IT1087728B (it) | 1985-06-04 |
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