JPS5367337A - Digital phase synchronous circuit - Google Patents

Digital phase synchronous circuit

Info

Publication number
JPS5367337A
JPS5367337A JP14260876A JP14260876A JPS5367337A JP S5367337 A JPS5367337 A JP S5367337A JP 14260876 A JP14260876 A JP 14260876A JP 14260876 A JP14260876 A JP 14260876A JP S5367337 A JPS5367337 A JP S5367337A
Authority
JP
Japan
Prior art keywords
synchronous circuit
digital phase
phase synchronous
incapable
enlarge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14260876A
Other languages
Japanese (ja)
Other versions
JPS5918894B2 (en
Inventor
Takashi Machida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP51142608A priority Critical patent/JPS5918894B2/en
Publication of JPS5367337A publication Critical patent/JPS5367337A/en
Publication of JPS5918894B2 publication Critical patent/JPS5918894B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range

Landscapes

  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To enlarge the frequency lead-in range for a digital phase synchronous circuit which is incapable of obtaining a continuous and equidistant input, by switching the action state of a phase detector.
JP51142608A 1976-11-27 1976-11-27 digital phase synchronization circuit Expired JPS5918894B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP51142608A JPS5918894B2 (en) 1976-11-27 1976-11-27 digital phase synchronization circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP51142608A JPS5918894B2 (en) 1976-11-27 1976-11-27 digital phase synchronization circuit

Publications (2)

Publication Number Publication Date
JPS5367337A true JPS5367337A (en) 1978-06-15
JPS5918894B2 JPS5918894B2 (en) 1984-05-01

Family

ID=15319273

Family Applications (1)

Application Number Title Priority Date Filing Date
JP51142608A Expired JPS5918894B2 (en) 1976-11-27 1976-11-27 digital phase synchronization circuit

Country Status (1)

Country Link
JP (1) JPS5918894B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5814629A (en) * 1981-07-20 1983-01-27 Canon Inc phase locked circuit
JPH01223823A (en) * 1988-03-03 1989-09-06 Nec Corp Phase looked oscillation circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5814629A (en) * 1981-07-20 1983-01-27 Canon Inc phase locked circuit
JPH01223823A (en) * 1988-03-03 1989-09-06 Nec Corp Phase looked oscillation circuit

Also Published As

Publication number Publication date
JPS5918894B2 (en) 1984-05-01

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