Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Fujitsu Ltd
Original Assignee
Fujitsu Ltd
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Filing date
Publication date
Application filed by Fujitsu LtdfiledCriticalFujitsu Ltd
Priority to JP14998476ApriorityCriticalpatent/JPS5374012A/en
Publication of JPS5374012ApublicationCriticalpatent/JPS5374012A/en
Signal Processing For Digital Recording And Reproducing
(AREA)
Dc Digital Transmission
(AREA)
Abstract
PURPOSE: To accurately detect synchronizing signal by using two clock signals and performing bit processing in so-called half bit unit of discriminating clock bits and data bits until the syncrhnozing signal is detected.
COPYRIGHT: (C)1978,JPO&Japio
JP14998476A1976-12-131976-12-13Data demodulating system
PendingJPS5374012A
(en)