JPS5378158A - Mos inverter circuit - Google Patents

Mos inverter circuit

Info

Publication number
JPS5378158A
JPS5378158A JP15348776A JP15348776A JPS5378158A JP S5378158 A JPS5378158 A JP S5378158A JP 15348776 A JP15348776 A JP 15348776A JP 15348776 A JP15348776 A JP 15348776A JP S5378158 A JPS5378158 A JP S5378158A
Authority
JP
Japan
Prior art keywords
inverter circuit
mos inverter
mos fet
capacitor
load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15348776A
Other languages
Japanese (ja)
Inventor
Yoshiiku Togei
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15348776A priority Critical patent/JPS5378158A/en
Publication of JPS5378158A publication Critical patent/JPS5378158A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Non-Volatile Memory (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To increase the switching speed, by using the punch thru operating type MOS FET for MOS FET for load and by connecting the gate electrode and the output terminal with a capacitor.
JP15348776A 1976-12-22 1976-12-22 Mos inverter circuit Pending JPS5378158A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15348776A JPS5378158A (en) 1976-12-22 1976-12-22 Mos inverter circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15348776A JPS5378158A (en) 1976-12-22 1976-12-22 Mos inverter circuit

Publications (1)

Publication Number Publication Date
JPS5378158A true JPS5378158A (en) 1978-07-11

Family

ID=15563635

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15348776A Pending JPS5378158A (en) 1976-12-22 1976-12-22 Mos inverter circuit

Country Status (1)

Country Link
JP (1) JPS5378158A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54178928U (en) * 1978-06-08 1979-12-18
JPH02305223A (en) * 1989-05-19 1990-12-18 Matsushita Electric Ind Co Ltd Inverter circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54178928U (en) * 1978-06-08 1979-12-18
JPH02305223A (en) * 1989-05-19 1990-12-18 Matsushita Electric Ind Co Ltd Inverter circuit

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