JPS5389629A - Main memory extension unit - Google Patents

Main memory extension unit

Info

Publication number
JPS5389629A
JPS5389629A JP391177A JP391177A JPS5389629A JP S5389629 A JPS5389629 A JP S5389629A JP 391177 A JP391177 A JP 391177A JP 391177 A JP391177 A JP 391177A JP S5389629 A JPS5389629 A JP S5389629A
Authority
JP
Japan
Prior art keywords
main memory
extension unit
memory extension
boundary register
dividing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP391177A
Other languages
Japanese (ja)
Inventor
Masumi Imai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP391177A priority Critical patent/JPS5389629A/en
Publication of JPS5389629A publication Critical patent/JPS5389629A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/0623—Address space extension for memory modules

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE:To extend the main memory with using a physical space by dividing a logical space into two by a boundary register and not only matching each divided page but also switching the address set in the boundary register dynamically.
JP391177A 1977-01-19 1977-01-19 Main memory extension unit Pending JPS5389629A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP391177A JPS5389629A (en) 1977-01-19 1977-01-19 Main memory extension unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP391177A JPS5389629A (en) 1977-01-19 1977-01-19 Main memory extension unit

Publications (1)

Publication Number Publication Date
JPS5389629A true JPS5389629A (en) 1978-08-07

Family

ID=11570358

Family Applications (1)

Application Number Title Priority Date Filing Date
JP391177A Pending JPS5389629A (en) 1977-01-19 1977-01-19 Main memory extension unit

Country Status (1)

Country Link
JP (1) JPS5389629A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5593583A (en) * 1979-01-02 1980-07-16 Honeywell Inf Systems Improvement of data processing system
JPS61166648A (en) * 1985-01-18 1986-07-28 Nec Corp Information

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5593583A (en) * 1979-01-02 1980-07-16 Honeywell Inf Systems Improvement of data processing system
JPS61166648A (en) * 1985-01-18 1986-07-28 Nec Corp Information

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