JPS54100603A - Scramble system of loop network - Google Patents

Scramble system of loop network

Info

Publication number
JPS54100603A
JPS54100603A JP760378A JP760378A JPS54100603A JP S54100603 A JPS54100603 A JP S54100603A JP 760378 A JP760378 A JP 760378A JP 760378 A JP760378 A JP 760378A JP S54100603 A JPS54100603 A JP S54100603A
Authority
JP
Japan
Prior art keywords
frame
stations
artificial random
circuit
random circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP760378A
Other languages
Japanese (ja)
Other versions
JPS5745500B2 (en
Inventor
Tadashi Murayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP760378A priority Critical patent/JPS54100603A/en
Publication of JPS54100603A publication Critical patent/JPS54100603A/en
Publication of JPS5745500B2 publication Critical patent/JPS5745500B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42—Loop networks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To make it possible to transfer data between any stations by constituting a closed loop by a scrambled transmission line. CONSTITUTION:Frame bits which are not scrambled allow frame-synchronous circuit 3 of sub-stations 2a to 2n to frame-synchronize together to synchronize artificial random circuits 4 among stations on a frame unit. Using the output pattern of artificial random circuits 4, 5a in each of 2a, 2b scrambles a received signal to obtain reception data and 5b scrambles transmission data 5b to obtain a transmitted signal, which is sent out. Therefore, frame synchronous circuit 3 and artificial random circuits 4 in all stations synchronize together. Master station 1, on the other hand, uses independent artificial random circuits 4a and 4b for a descramble circuit and scramble circuit and then compensates a frame phase difference by elastic store 8.
JP760378A 1978-01-26 1978-01-26 Scramble system of loop network Granted JPS54100603A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP760378A JPS54100603A (en) 1978-01-26 1978-01-26 Scramble system of loop network

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP760378A JPS54100603A (en) 1978-01-26 1978-01-26 Scramble system of loop network

Publications (2)

Publication Number Publication Date
JPS54100603A true JPS54100603A (en) 1979-08-08
JPS5745500B2 JPS5745500B2 (en) 1982-09-28

Family

ID=11670367

Family Applications (1)

Application Number Title Priority Date Filing Date
JP760378A Granted JPS54100603A (en) 1978-01-26 1978-01-26 Scramble system of loop network

Country Status (1)

Country Link
JP (1) JPS54100603A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62290234A (en) * 1986-06-10 1987-12-17 Nec Corp Frame synchronizing system for loop-type communication network
JPS63304555A (en) * 1987-06-02 1988-12-12 Futaba Corp Fluorescent light emitting device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5057107A (en) * 1973-09-17 1975-05-19

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5057107A (en) * 1973-09-17 1975-05-19

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62290234A (en) * 1986-06-10 1987-12-17 Nec Corp Frame synchronizing system for loop-type communication network
JPS63304555A (en) * 1987-06-02 1988-12-12 Futaba Corp Fluorescent light emitting device

Also Published As

Publication number Publication date
JPS5745500B2 (en) 1982-09-28

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