JPS54127630A - Display unit - Google Patents

Display unit

Info

Publication number
JPS54127630A
JPS54127630A JP3572778A JP3572778A JPS54127630A JP S54127630 A JPS54127630 A JP S54127630A JP 3572778 A JP3572778 A JP 3572778A JP 3572778 A JP3572778 A JP 3572778A JP S54127630 A JPS54127630 A JP S54127630A
Authority
JP
Japan
Prior art keywords
memory
display
contents
register
address register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3572778A
Other languages
Japanese (ja)
Inventor
Akira Motoyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP3572778A priority Critical patent/JPS54127630A/en
Publication of JPS54127630A publication Critical patent/JPS54127630A/en
Pending legal-status Critical Current

Links

Landscapes

  • Document Processing Apparatus (AREA)
  • Digital Computer Display Output (AREA)

Abstract

PURPOSE: To accelerate the editing speed by carrying out the editing without changing the contents of the memory by giving writing to the line address register via the control circuit and then selecting one of the line address registers via the address register with transmission of the contents of the line address register to the memory.
CONSTITUTION: Memory 5 supplies the address information of address register 3, performs the reading and writing of the display information corresponding to the address information, and converts the display information read out from memory 5 into the pattern of the character, figure and the like at display part 8 to display it on the display screen. Here, line address register 10 prescribes the line array of the display information on the display screen. Then the writing is given to regisiter 10 via control circuit 9; register 3 selects one of registers 10; and the contents of the selected register is given to memory 5. In this way, the display information is edited in the prescribed sequence without changing the contents of memory 5, thus accelerating the speed of edition.
COPYRIGHT: (C)1979,JPO&Japio
JP3572778A 1978-03-28 1978-03-28 Display unit Pending JPS54127630A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3572778A JPS54127630A (en) 1978-03-28 1978-03-28 Display unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3572778A JPS54127630A (en) 1978-03-28 1978-03-28 Display unit

Publications (1)

Publication Number Publication Date
JPS54127630A true JPS54127630A (en) 1979-10-03

Family

ID=12449874

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3572778A Pending JPS54127630A (en) 1978-03-28 1978-03-28 Display unit

Country Status (1)

Country Link
JP (1) JPS54127630A (en)

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