JPS54128251A - Mute circuit - Google Patents

Mute circuit

Info

Publication number
JPS54128251A
JPS54128251A JP3553478A JP3553478A JPS54128251A JP S54128251 A JPS54128251 A JP S54128251A JP 3553478 A JP3553478 A JP 3553478A JP 3553478 A JP3553478 A JP 3553478A JP S54128251 A JPS54128251 A JP S54128251A
Authority
JP
Japan
Prior art keywords
transistor
mute
circuit
signal
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3553478A
Other languages
Japanese (ja)
Inventor
Kazuo Watanabe
Masanori Ienaka
Yasuo Kominami
Kiyoshi Honma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3553478A priority Critical patent/JPS54128251A/en
Publication of JPS54128251A publication Critical patent/JPS54128251A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers
    • H03G3/20—Automatic control
    • H03G3/30—Automatic control in amplifiers having semiconductor devices
    • H03G3/34—Muting amplifier when no signal is present

Landscapes

  • Control Of Amplification And Gain Control (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To obtain a mute circuit which features the low-noise signal route and high input sensitivity and is suited to the semiconductor integration by providing the current mirror circuit to the input with the differential amplifier used for control. CONSTITUTION:When mute signal 14 is at low level, the transistor of the mute signal input circuit becomes nonconductive and output 12 shows the high voltage. Thus, differential paired transistor Q54 and Q55 constituting the mute circuit conduct. As a result, the emitter current of signal amplifying transistor Q47 flows to transistor Q54 of the mute circuit, and thus the amplified signal is delivered from Q54. In case the signal 14 is at high level, the transistor of the mute signal input circuit becomes nonconductive. And transistor Q53 and Q56 conduct contrarily to the above at the differential pair circuit, but no current flows to the output transistor side thus to obtain the output of zero.
JP3553478A 1978-03-29 1978-03-29 Mute circuit Pending JPS54128251A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3553478A JPS54128251A (en) 1978-03-29 1978-03-29 Mute circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3553478A JPS54128251A (en) 1978-03-29 1978-03-29 Mute circuit

Publications (1)

Publication Number Publication Date
JPS54128251A true JPS54128251A (en) 1979-10-04

Family

ID=12444392

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3553478A Pending JPS54128251A (en) 1978-03-29 1978-03-29 Mute circuit

Country Status (1)

Country Link
JP (1) JPS54128251A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56123110A (en) * 1980-03-05 1981-09-28 Hitachi Ltd Muting circuit
JPS5750115A (en) * 1980-09-10 1982-03-24 Nec Corp Gain control circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56123110A (en) * 1980-03-05 1981-09-28 Hitachi Ltd Muting circuit
JPS5750115A (en) * 1980-09-10 1982-03-24 Nec Corp Gain control circuit

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