JPS54130963A - Electronic hour striking circuit - Google Patents

Electronic hour striking circuit

Info

Publication number
JPS54130963A
JPS54130963A JP3834178A JP3834178A JPS54130963A JP S54130963 A JPS54130963 A JP S54130963A JP 3834178 A JP3834178 A JP 3834178A JP 3834178 A JP3834178 A JP 3834178A JP S54130963 A JPS54130963 A JP S54130963A
Authority
JP
Japan
Prior art keywords
flop
flip
circuit
pulse signals
hour striking
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3834178A
Other languages
Japanese (ja)
Other versions
JPS6122792B2 (en
Inventor
Minoru Kuroda
Hiroshi Itoyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP3834178A priority Critical patent/JPS54130963A/en
Publication of JPS54130963A publication Critical patent/JPS54130963A/en
Publication of JPS6122792B2 publication Critical patent/JPS6122792B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G04—HOROLOGY
    • G04G—ELECTRONIC TIME-PIECES
    • G04G13/00—Producing acoustic time signals

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Clocks (AREA)

Abstract

PURPOSE:To prevent the unnecessary hour striking sounds from being generated when a power source is thrown by providing a logic gate circuit which is operative to generate such signals at the signal input terminal of flip-flop as block the inversion of the flip-flop. CONSTITUTION:A flip-flop E1 from being inverted by a logic gate circuit 2, during the time period from the throw of the power source to the disappearance of the pulse signals of a non-pulse generator 1, while taking the initial condition of the output at a 1 level. Then, a rotary swtich RS has its connection interchanged with a terminald b, and the switch SW2 of a time correcting circuit 9 is turned on. Then, pulse signals are generared from the circuit 9 so that the flip-flop F1 is inverted to reset frequency dividing steps FF14 to FF20. Then, hour striking periodic pulse signals are generated and fed to an attenuating circuit 14 to turn on and off transfer gates TG2 and TG3 so that the speaker 17 of an amplifier 16 is opeated.
JP3834178A 1978-03-31 1978-03-31 Electronic hour striking circuit Granted JPS54130963A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3834178A JPS54130963A (en) 1978-03-31 1978-03-31 Electronic hour striking circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3834178A JPS54130963A (en) 1978-03-31 1978-03-31 Electronic hour striking circuit

Publications (2)

Publication Number Publication Date
JPS54130963A true JPS54130963A (en) 1979-10-11
JPS6122792B2 JPS6122792B2 (en) 1986-06-03

Family

ID=12522574

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3834178A Granted JPS54130963A (en) 1978-03-31 1978-03-31 Electronic hour striking circuit

Country Status (1)

Country Link
JP (1) JPS54130963A (en)

Also Published As

Publication number Publication date
JPS6122792B2 (en) 1986-06-03

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