JPS54138363A - Semiconductor circuit - Google Patents
Semiconductor circuitInfo
- Publication number
- JPS54138363A JPS54138363A JP4609978A JP4609978A JPS54138363A JP S54138363 A JPS54138363 A JP S54138363A JP 4609978 A JP4609978 A JP 4609978A JP 4609978 A JP4609978 A JP 4609978A JP S54138363 A JPS54138363 A JP S54138363A
- Authority
- JP
- Japan
- Prior art keywords
- output terminal
- level
- constitution
- resistor
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00307—Modifications for increasing the reliability for protection in bipolar transistor circuits
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
- Bipolar Transistors (AREA)
Abstract
PURPOSE:To decrease the cross talk by high density implementation, by increasing the switching speed through the reduction in the logical amplitude with the connection of the series circuit consisting of a diode and a resistor to the output terminal of the NAND gate of fundamental constitution. CONSTITUTION:The fundamental constitution of a NAND gate is made with transistors Q1, Q2 and resistors R1, R2, and when the input terminal IN is at high level, the transistor Q2 is conductive and the output terminal OUT is at low level. When the input terminal IN is at low level, the transistor Q2 is turned off and the output terminal is at high level. Further, the output level is clamped with the series circuit consisting of a diode D1 and a resistor R3 connected to the output terminal OUT, and the logical amplitude is reduced in comparison with the power supply voltage Vcc.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4609978A JPS54138363A (en) | 1978-04-19 | 1978-04-19 | Semiconductor circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4609978A JPS54138363A (en) | 1978-04-19 | 1978-04-19 | Semiconductor circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS54138363A true JPS54138363A (en) | 1979-10-26 |
Family
ID=12737539
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4609978A Pending JPS54138363A (en) | 1978-04-19 | 1978-04-19 | Semiconductor circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS54138363A (en) |
-
1978
- 1978-04-19 JP JP4609978A patent/JPS54138363A/en active Pending
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