JPS5419319A - Synchronous protection circuit - Google Patents

Synchronous protection circuit

Info

Publication number
JPS5419319A
JPS5419319A JP8443777A JP8443777A JPS5419319A JP S5419319 A JPS5419319 A JP S5419319A JP 8443777 A JP8443777 A JP 8443777A JP 8443777 A JP8443777 A JP 8443777A JP S5419319 A JPS5419319 A JP S5419319A
Authority
JP
Japan
Prior art keywords
protection circuit
synchronous protection
clamping
synchronous
accuracy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8443777A
Other languages
Japanese (ja)
Other versions
JPS5751779B2 (en
Inventor
Takao Moriya
Masao Yamazawa
Tetsuo Soejima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP8443777A priority Critical patent/JPS5419319A/en
Publication of JPS5419319A publication Critical patent/JPS5419319A/en
Publication of JPS5751779B2 publication Critical patent/JPS5751779B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:To increase the accuracy for the backward protection time, by clamping the error detection pulse representing that the frame synchronous signal can not be detected and by clamping the reversible counter to a given value predetermined.
JP8443777A 1977-07-14 1977-07-14 Synchronous protection circuit Granted JPS5419319A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8443777A JPS5419319A (en) 1977-07-14 1977-07-14 Synchronous protection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8443777A JPS5419319A (en) 1977-07-14 1977-07-14 Synchronous protection circuit

Publications (2)

Publication Number Publication Date
JPS5419319A true JPS5419319A (en) 1979-02-14
JPS5751779B2 JPS5751779B2 (en) 1982-11-04

Family

ID=13830557

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8443777A Granted JPS5419319A (en) 1977-07-14 1977-07-14 Synchronous protection circuit

Country Status (1)

Country Link
JP (1) JPS5419319A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10620563B2 (en) 2016-10-31 2020-04-14 Canon Kabushiki Kaisha Developer container, process cartridge, and image forming apparatus
JP7009150B2 (en) 2016-11-09 2022-01-25 キヤノン株式会社 Units, process cartridges and image forming equipment

Also Published As

Publication number Publication date
JPS5751779B2 (en) 1982-11-04

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