JPS5451426A - Synchronizing signal lead connection system - Google Patents

Synchronizing signal lead connection system

Info

Publication number
JPS5451426A
JPS5451426A JP11741977A JP11741977A JPS5451426A JP S5451426 A JPS5451426 A JP S5451426A JP 11741977 A JP11741977 A JP 11741977A JP 11741977 A JP11741977 A JP 11741977A JP S5451426 A JPS5451426 A JP S5451426A
Authority
JP
Japan
Prior art keywords
signal line
connection
dsyc
read
difference
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11741977A
Other languages
Japanese (ja)
Inventor
Masateru Tagami
Tadashi Kawanobe
Yoichi Kawashima
Yoshio Nakano
Noboru Suemori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Oki Electric Industry Co Ltd
NTT Inc
Original Assignee
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP11741977A priority Critical patent/JPS5451426A/en
Publication of JPS5451426A publication Critical patent/JPS5451426A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To make easy the reception control, to promote high speed connection and to restrict the increase in the number of signal lines and the amount of interface hardware, by absorbing the difference in speed due to the difference of the distadnce between units.
CONSTITUTION: The data synchronizing signal line DSYCo-n is provided with each memory unit Mo to Mn and it is made lead connection with the central processing unit CC. Ahead the read-in data RD, the data synchronizing signal DSYC is delivered to CC, which opens the gate after rceiving DSYC and receives RD depending on the time delay due to the difference in the distance between units. Next, to make highly dense the unit connection system and to reduce the amount of hardware , the read-in signal line and the write-in signal line are made common and bidirectional delivery is made. That is, the address signal line AD of common connection, and the read-in and write-in data lines RD/WD of common connection are provided
COPYRIGHT: (C)1979,JPO&Japio
JP11741977A 1977-09-30 1977-09-30 Synchronizing signal lead connection system Pending JPS5451426A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11741977A JPS5451426A (en) 1977-09-30 1977-09-30 Synchronizing signal lead connection system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11741977A JPS5451426A (en) 1977-09-30 1977-09-30 Synchronizing signal lead connection system

Publications (1)

Publication Number Publication Date
JPS5451426A true JPS5451426A (en) 1979-04-23

Family

ID=14711171

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11741977A Pending JPS5451426A (en) 1977-09-30 1977-09-30 Synchronizing signal lead connection system

Country Status (1)

Country Link
JP (1) JPS5451426A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5017146A (en) * 1973-05-01 1975-02-22
JPS50108845A (en) * 1974-02-01 1975-08-27

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5017146A (en) * 1973-05-01 1975-02-22
JPS50108845A (en) * 1974-02-01 1975-08-27

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