JPS5452949A - Electronic computer - Google Patents

Electronic computer

Info

Publication number
JPS5452949A
JPS5452949A JP11958877A JP11958877A JPS5452949A JP S5452949 A JPS5452949 A JP S5452949A JP 11958877 A JP11958877 A JP 11958877A JP 11958877 A JP11958877 A JP 11958877A JP S5452949 A JPS5452949 A JP S5452949A
Authority
JP
Japan
Prior art keywords
region
sin
program
supplied
execution region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11958877A
Other languages
Japanese (ja)
Other versions
JPS6112587B2 (en
Inventor
Teruaki Nakamura
Hiroshi Kadota
Hideki Yagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11958877A priority Critical patent/JPS5452949A/en
Publication of JPS5452949A publication Critical patent/JPS5452949A/en
Publication of JPS6112587B2 publication Critical patent/JPS6112587B2/ja
Granted legal-status Critical Current

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  • Input From Keyboards Or The Like (AREA)

Abstract

PURPOSE: To ensure the high-efficiency arithmetic action as well as to minimize the execution region of the program memory unit and the like, by executing the function indicated by operation of plural keys as one program step with the computer.
CONSTITUTION: When the calculation of Sin-1 X is carried out, value X is generated via operation key 13-1 and the value is supplied to first region 12-1 of execution region 12 where the program memory is performed. Then the signals or key codes corresponding to "INV"and "Sin" are produced via operation key 13-2 and 13-3 to be supplied to program code generator 14. Generator 14 then produces the program code signal corresponding to Sin-1 from the above mentioned signals to supply the signal to second region 12-2 of execution region 12 as one program step. After this, the arithmetic process is carried out as conventional through control of CPU11
COPYRIGHT: (C)1979,JPO&Japio
JP11958877A 1977-10-04 1977-10-04 Electronic computer Granted JPS5452949A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11958877A JPS5452949A (en) 1977-10-04 1977-10-04 Electronic computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11958877A JPS5452949A (en) 1977-10-04 1977-10-04 Electronic computer

Publications (2)

Publication Number Publication Date
JPS5452949A true JPS5452949A (en) 1979-04-25
JPS6112587B2 JPS6112587B2 (en) 1986-04-09

Family

ID=14765076

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11958877A Granted JPS5452949A (en) 1977-10-04 1977-10-04 Electronic computer

Country Status (1)

Country Link
JP (1) JPS5452949A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56149667A (en) * 1980-04-21 1981-11-19 Sharp Corp Electronic interpreter
JP2007518143A (en) * 2004-09-28 2007-07-05 カシオ計算機株式会社 Arithmetic processing unit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56149667A (en) * 1980-04-21 1981-11-19 Sharp Corp Electronic interpreter
JP2007518143A (en) * 2004-09-28 2007-07-05 カシオ計算機株式会社 Arithmetic processing unit

Also Published As

Publication number Publication date
JPS6112587B2 (en) 1986-04-09

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