JPS5452952A - Control memory mimic device - Google Patents

Control memory mimic device

Info

Publication number
JPS5452952A
JPS5452952A JP11962077A JP11962077A JPS5452952A JP S5452952 A JPS5452952 A JP S5452952A JP 11962077 A JP11962077 A JP 11962077A JP 11962077 A JP11962077 A JP 11962077A JP S5452952 A JPS5452952 A JP S5452952A
Authority
JP
Japan
Prior art keywords
memory
control program
control
mimic device
control memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11962077A
Other languages
Japanese (ja)
Inventor
Hitoshi Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP11962077A priority Critical patent/JPS5452952A/en
Publication of JPS5452952A publication Critical patent/JPS5452952A/en
Pending legal-status Critical Current

Links

Landscapes

  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE: To enhance the degree of utilization for the control program by combining the volatile high-speed memory and the nonvolatile low-speed memory and using the control program of the high-speed memory when necessary or shifting the control memory from the nonvolatile memory to the volatile memory.
CONSTITUTION: Retention memory part 10 is provided as a memory part of the control program in the control memory mimic device, and the control program store in part 10 is loaded to control memory part 8 when necessary. When part 8 is used as the subcontrol memory part of the control program processor, the control program memorized in part 8 is used. Then the used control program is retained (10) agian. The control program can also be delivered to external control unit 14 vis external control unit interface 7 and by the indication given from operation part 12 as well as to part 12. Thus, an easy confirmation of the control program becomes possible for the operator
COPYRIGHT: (C)1979,JPO&Japio
JP11962077A 1977-10-05 1977-10-05 Control memory mimic device Pending JPS5452952A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11962077A JPS5452952A (en) 1977-10-05 1977-10-05 Control memory mimic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11962077A JPS5452952A (en) 1977-10-05 1977-10-05 Control memory mimic device

Publications (1)

Publication Number Publication Date
JPS5452952A true JPS5452952A (en) 1979-04-25

Family

ID=14765933

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11962077A Pending JPS5452952A (en) 1977-10-05 1977-10-05 Control memory mimic device

Country Status (1)

Country Link
JP (1) JPS5452952A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56108154A (en) * 1980-01-31 1981-08-27 Meidensha Electric Mfg Co Ltd Microprogram debug system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56108154A (en) * 1980-01-31 1981-08-27 Meidensha Electric Mfg Co Ltd Microprogram debug system

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