JPS54532A - Pulse operation circuit - Google Patents

Pulse operation circuit

Info

Publication number
JPS54532A
JPS54532A JP6553177A JP6553177A JPS54532A JP S54532 A JPS54532 A JP S54532A JP 6553177 A JP6553177 A JP 6553177A JP 6553177 A JP6553177 A JP 6553177A JP S54532 A JPS54532 A JP S54532A
Authority
JP
Japan
Prior art keywords
operation circuit
pulse operation
counter
subtractor
pulses
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6553177A
Other languages
Japanese (ja)
Inventor
Toshiharu Ueda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP6553177A priority Critical patent/JPS54532A/en
Publication of JPS54532A publication Critical patent/JPS54532A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/605Additive or subtractive mixing of two pulse rates into one

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Physics (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To achieve simple and less expensive constitution, by using an up and down counter in place of the counter and subtractor, and by controlling the up and down input with the interlock circuit so that pulses are not fed to the both inputs at the same time.
JP6553177A 1977-06-02 1977-06-02 Pulse operation circuit Pending JPS54532A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6553177A JPS54532A (en) 1977-06-02 1977-06-02 Pulse operation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6553177A JPS54532A (en) 1977-06-02 1977-06-02 Pulse operation circuit

Publications (1)

Publication Number Publication Date
JPS54532A true JPS54532A (en) 1979-01-05

Family

ID=13289677

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6553177A Pending JPS54532A (en) 1977-06-02 1977-06-02 Pulse operation circuit

Country Status (1)

Country Link
JP (1) JPS54532A (en)

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