JPS5455111A - Digital agc system - Google Patents

Digital agc system

Info

Publication number
JPS5455111A
JPS5455111A JP12136577A JP12136577A JPS5455111A JP S5455111 A JPS5455111 A JP S5455111A JP 12136577 A JP12136577 A JP 12136577A JP 12136577 A JP12136577 A JP 12136577A JP S5455111 A JPS5455111 A JP S5455111A
Authority
JP
Japan
Prior art keywords
multiplier
output
converter
circuit
supplied
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12136577A
Other languages
Japanese (ja)
Inventor
Kazuo Murano
Shigeyuki Umigami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP12136577A priority Critical patent/JPS5455111A/en
Publication of JPS5455111A publication Critical patent/JPS5455111A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers
    • H03G3/20—Automatic control
    • H03G3/30—Automatic control in amplifiers having semiconductor devices
    • H03G3/3052—Automatic control in amplifiers having semiconductor devices in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver

Landscapes

  • Control Of Amplification And Gain Control (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

PURPOSE:To obtain high operation stability, and to simplify LSI-implementation by linearly converting the output of a companding type A/D converter for AGC operation on a data transmission system. CONSTITUTION:Analog input signals are supplied to companding type A/D converter 31, whose outputs are supplied to nonlinear-to-linear converter 32, so that its digital outputs will be made to correspond to analog input signals of converter 31 respectively. By being multiplied by the output signal from multiplier generating circuit 26 at multiplier 23, the linear digital signal is sent to the next stage as an automatically-gain-controlled digital output. In this case, some of the output of multiplier 23 is lead into level supervisory circuit 25, the output equivalent to the detected level variation is supplied to circuit 26, and the corresponding multiplier is given to multiplier 23 from circuit 26, thereby attaining the AGC operation.
JP12136577A 1977-10-12 1977-10-12 Digital agc system Pending JPS5455111A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12136577A JPS5455111A (en) 1977-10-12 1977-10-12 Digital agc system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12136577A JPS5455111A (en) 1977-10-12 1977-10-12 Digital agc system

Publications (1)

Publication Number Publication Date
JPS5455111A true JPS5455111A (en) 1979-05-02

Family

ID=14809434

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12136577A Pending JPS5455111A (en) 1977-10-12 1977-10-12 Digital agc system

Country Status (1)

Country Link
JP (1) JPS5455111A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59223009A (en) * 1983-06-01 1984-12-14 Fujitsu Ltd Digital processing type automatic gain controlling circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5057756A (en) * 1973-09-25 1975-05-20

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5057756A (en) * 1973-09-25 1975-05-20

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59223009A (en) * 1983-06-01 1984-12-14 Fujitsu Ltd Digital processing type automatic gain controlling circuit

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