JPS5457904A - Information transmission supervisory unit - Google Patents

Information transmission supervisory unit

Info

Publication number
JPS5457904A
JPS5457904A JP12546977A JP12546977A JPS5457904A JP S5457904 A JPS5457904 A JP S5457904A JP 12546977 A JP12546977 A JP 12546977A JP 12546977 A JP12546977 A JP 12546977A JP S5457904 A JPS5457904 A JP S5457904A
Authority
JP
Japan
Prior art keywords
circuit
output
information
transmission
information transmission
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12546977A
Other languages
Japanese (ja)
Inventor
Fumiya Nagata
Kazuo Arao
Yasushi Nakao
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP12546977A priority Critical patent/JPS5457904A/en
Publication of JPS5457904A publication Critical patent/JPS5457904A/en
Pending legal-status Critical Current

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  • Monitoring And Testing Of Transmission In General (AREA)

Abstract

PURPOSE: To prevent the transmission of erroneous information to improve transmission reliability by collating input information and transmission code with each other.
CONSTITUTION: Input information I0 is coded in coding circuit 2, and the output and information I0 are collated with each other by detector circuit 4-1 and AND circuit 4-3 of supervisory circuit 4; and if they agree with each other, the output can be obtained from AND circuit 4-6 through OR circuit 4-5 and is transmitted after FS modulation in 3. Input information I1 is also collated similarly; and if inoformation I1 agrees with the coded output is subjected to FS modulation 3. Meanwhile, in case that any anomaly has occurred in input circuit 1 and coding circuit 2, the output of circuits 4-3, 4-4 and 4-5 cannot be obtained, so that gate 4-6 is not opened and the transmission of erroneous information can be prevented
COPYRIGHT: (C)1979,JPO&Japio
JP12546977A 1977-10-18 1977-10-18 Information transmission supervisory unit Pending JPS5457904A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12546977A JPS5457904A (en) 1977-10-18 1977-10-18 Information transmission supervisory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12546977A JPS5457904A (en) 1977-10-18 1977-10-18 Information transmission supervisory unit

Publications (1)

Publication Number Publication Date
JPS5457904A true JPS5457904A (en) 1979-05-10

Family

ID=14910849

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12546977A Pending JPS5457904A (en) 1977-10-18 1977-10-18 Information transmission supervisory unit

Country Status (1)

Country Link
JP (1) JPS5457904A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50147814A (en) * 1974-05-17 1975-11-27

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50147814A (en) * 1974-05-17 1975-11-27

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