JPS5457923A - Faulty input/output device switching processing system in on-line system - Google Patents
Faulty input/output device switching processing system in on-line systemInfo
- Publication number
- JPS5457923A JPS5457923A JP12480077A JP12480077A JPS5457923A JP S5457923 A JPS5457923 A JP S5457923A JP 12480077 A JP12480077 A JP 12480077A JP 12480077 A JP12480077 A JP 12480077A JP S5457923 A JPS5457923 A JP S5457923A
- Authority
- JP
- Japan
- Prior art keywords
- output device
- input
- processing system
- information corresponding
- switching processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Hardware Redundancy (AREA)
Abstract
PURPOSE: To simplify switching with making the best use of the existent processing system by indexing the input/output device management table and setting address information corresponding to an auxiliary input/output device when fault has occurred in a current input/output device.
CONSTITUTION: Correspondingly to each file stored in input/output devices 4 and 5, file control table 11 stores required file control information and device control table 10 stores device control information to have access to devices 4 and 5. Then, address information corresponding to input/output devices are classified for the current input/output device and the auxiliary input/output device and stored in input/output device management table 12 beforehand, and table 12 is indexed to set address information corresponding to the auxiliary input/output device when fault has occurred in the current input/output device. As a result, the switching can be simplified with making the best use of the existent processing system
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12480077A JPS5457923A (en) | 1977-10-18 | 1977-10-18 | Faulty input/output device switching processing system in on-line system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12480077A JPS5457923A (en) | 1977-10-18 | 1977-10-18 | Faulty input/output device switching processing system in on-line system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5457923A true JPS5457923A (en) | 1979-05-10 |
| JPS5718213B2 JPS5718213B2 (en) | 1982-04-15 |
Family
ID=14894428
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12480077A Granted JPS5457923A (en) | 1977-10-18 | 1977-10-18 | Faulty input/output device switching processing system in on-line system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5457923A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5848151A (en) * | 1981-09-17 | 1983-03-22 | Fujitsu Ltd | Informing system for optimized constitution |
| JPS58137054A (en) * | 1981-10-01 | 1983-08-15 | ストレイタス・コンピユ−タ・インコ−ポレイテツド | Highly reliable digital data processor |
| JPS6459550A (en) * | 1987-08-31 | 1989-03-07 | Fujitsu Ltd | System for controlling automatic bypass of message |
-
1977
- 1977-10-18 JP JP12480077A patent/JPS5457923A/en active Granted
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5848151A (en) * | 1981-09-17 | 1983-03-22 | Fujitsu Ltd | Informing system for optimized constitution |
| JPS58137054A (en) * | 1981-10-01 | 1983-08-15 | ストレイタス・コンピユ−タ・インコ−ポレイテツド | Highly reliable digital data processor |
| JPS6459550A (en) * | 1987-08-31 | 1989-03-07 | Fujitsu Ltd | System for controlling automatic bypass of message |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5718213B2 (en) | 1982-04-15 |
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