JPS5459848A - Fault detecting device for subroutine action - Google Patents

Fault detecting device for subroutine action

Info

Publication number
JPS5459848A
JPS5459848A JP12584577A JP12584577A JPS5459848A JP S5459848 A JPS5459848 A JP S5459848A JP 12584577 A JP12584577 A JP 12584577A JP 12584577 A JP12584577 A JP 12584577A JP S5459848 A JPS5459848 A JP S5459848A
Authority
JP
Japan
Prior art keywords
signal
subroutine
circuit
counter
error
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12584577A
Other languages
Japanese (ja)
Other versions
JPS5844261B2 (en
Inventor
Hisashi Kimura
Akihiro Hayakawa
Hiroshi Ichii
Kiyoo Moroto
Hirotoshi Koketsu
Hidehiko Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP52125845A priority Critical patent/JPS5844261B2/en
Publication of JPS5459848A publication Critical patent/JPS5459848A/en
Publication of JPS5844261B2 publication Critical patent/JPS5844261B2/en
Expired legal-status Critical Current

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  • Executing Machine-Instructions (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To obtain a simple device to detect the fault of the subroutine action by providing the error generating means which is compsed of the logic product output between the signal under execution of the subroutine and the return order signal plus the subroutine multipliexing counter.
CONSTITUTION: Subroutine counter 1 is counted up by the subroutine jump SSJ order via the up-down counter which counts the degree of multiplexing for the subroutine. Highest-rank output bit SUB3 of counter 1 is applied to the OR circuit in the fault detecting circuit. The signal showing the subroutine being executed at FF7 plus its NOT signal ×FTSSJ are delivred through terminal Q and -Q respectively, and the NOT signal and return order signal DCDRRTRN are supplied to AND circuit 13 to generate the error signal from the Q terminal of FF8 via OR circuit 14. In circuit 14, the error signal is delivered through FF8 when signal SUB3 is supplied. In other words, the error signal is generated when the return order is delivered although no execution is given at the subrutine region and when the inhibition multiplexing region is given
COPYRIGHT: (C)1979,JPO&Japio
JP52125845A 1977-10-21 1977-10-21 Subroutine operation failure detection device Expired JPS5844261B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52125845A JPS5844261B2 (en) 1977-10-21 1977-10-21 Subroutine operation failure detection device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52125845A JPS5844261B2 (en) 1977-10-21 1977-10-21 Subroutine operation failure detection device

Publications (2)

Publication Number Publication Date
JPS5459848A true JPS5459848A (en) 1979-05-14
JPS5844261B2 JPS5844261B2 (en) 1983-10-01

Family

ID=14920357

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52125845A Expired JPS5844261B2 (en) 1977-10-21 1977-10-21 Subroutine operation failure detection device

Country Status (1)

Country Link
JP (1) JPS5844261B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS575156A (en) * 1980-05-07 1982-01-11 Fairchild Camera Instr Co Interruptible microprogram sequence device
JPS59153248A (en) * 1983-02-21 1984-09-01 Omron Tateisi Electronics Co Debugging device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS575156A (en) * 1980-05-07 1982-01-11 Fairchild Camera Instr Co Interruptible microprogram sequence device
JPS59153248A (en) * 1983-02-21 1984-09-01 Omron Tateisi Electronics Co Debugging device

Also Published As

Publication number Publication date
JPS5844261B2 (en) 1983-10-01

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