JPS5464480A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5464480A
JPS5464480A JP13106777A JP13106777A JPS5464480A JP S5464480 A JPS5464480 A JP S5464480A JP 13106777 A JP13106777 A JP 13106777A JP 13106777 A JP13106777 A JP 13106777A JP S5464480 A JPS5464480 A JP S5464480A
Authority
JP
Japan
Prior art keywords
film
gate electrode
substrate
sio
polycrystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13106777A
Other languages
Japanese (ja)
Inventor
Masanori Kikuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP13106777A priority Critical patent/JPS5464480A/en
Priority to DE2847305A priority patent/DE2847305C2/en
Publication of JPS5464480A publication Critical patent/JPS5464480A/en
Pending legal-status Critical Current

Links

Landscapes

  • Non-Volatile Memory (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE: To establish the non-volatile memory unit high in the circuit integration and reliability with good yield rate, by forming the floating gate electrode with self- alignment to the inactive insulation film provided on the semiconductor substrate, and by providing the control gate electrode via the insulation film on it.
CONSTITUTION: On the major plane 2 of the P type Si substrate 1, the first gate SiO2 film 3, first polycrystal Si film 4 being the floating gate electrode, and Si3N4 film are grown with lamination, and the part on the substrate 1 edge other than the source, drain and channel formation region is removed. Next, thick field SiO2 film 6 is grown, and the film 5 surrounded with the film 6 is renewed into the second gate SiO2 film, and the second polycrystal Si film 8 being the control gate electrode 8 is formed at the center. After that, the films 3, 4, 5 are removed by etching by taking the film 8 as a mask, the N type impurity is diffused on the surfaces 9 and 10 of the surface of the exposed substrate 1, forming the N type source and drain regions 11 and 12.
COPYRIGHT: (C)1979,JPO&Japio
JP13106777A 1977-10-31 1977-10-31 Semiconductor device Pending JPS5464480A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP13106777A JPS5464480A (en) 1977-10-31 1977-10-31 Semiconductor device
DE2847305A DE2847305C2 (en) 1977-10-31 1978-10-31 A method of manufacturing a floating gate semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13106777A JPS5464480A (en) 1977-10-31 1977-10-31 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5464480A true JPS5464480A (en) 1979-05-24

Family

ID=15049222

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13106777A Pending JPS5464480A (en) 1977-10-31 1977-10-31 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5464480A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02373A (en) * 1987-10-09 1990-01-05 Sgs Thomson Microelectron Sa Integrated circuit memory

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5051276A (en) * 1973-08-06 1975-05-08
JPS5075775A (en) * 1973-11-06 1975-06-21
JPS53124084A (en) * 1977-04-06 1978-10-30 Hitachi Ltd Semiconductor memory device containing floating type poly silicon layer and its manufacture

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5051276A (en) * 1973-08-06 1975-05-08
JPS5075775A (en) * 1973-11-06 1975-06-21
JPS53124084A (en) * 1977-04-06 1978-10-30 Hitachi Ltd Semiconductor memory device containing floating type poly silicon layer and its manufacture

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02373A (en) * 1987-10-09 1990-01-05 Sgs Thomson Microelectron Sa Integrated circuit memory

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