JPS5469352A - Data storage processing system - Google Patents

Data storage processing system

Info

Publication number
JPS5469352A
JPS5469352A JP13682477A JP13682477A JPS5469352A JP S5469352 A JPS5469352 A JP S5469352A JP 13682477 A JP13682477 A JP 13682477A JP 13682477 A JP13682477 A JP 13682477A JP S5469352 A JPS5469352 A JP S5469352A
Authority
JP
Japan
Prior art keywords
units
memory
generated
constitution
data storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13682477A
Other languages
Japanese (ja)
Inventor
Minoru Itakura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP13682477A priority Critical patent/JPS5469352A/en
Publication of JPS5469352A publication Critical patent/JPS5469352A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To symprify the constitution of whole system, reduce the load of CPU and increase the processing speed by writing plural data records on the memory unit in the I/O memory device independently from indication CPU.
CONSTITUTION: When check point data record CR.A is generated, CPU1 writes A, for example, on memory units 9#0, and 9#1. When CR.B and CR.C are generated successively, they are written respectively on units 9#0 and 9#1 in the same manner. Since the memory units have not region which can accept the write request of another CR.A generated from CPU1, any of channel 7, I/O controller 8 and I/O memory device 5 is initiated and 1 block stored in units 9#0 and 9#1, where records A, B and C are stored, is written on device 5#0, for examle, magnetic tape.
COPYRIGHT: (C)1979,JPO&Japio
JP13682477A 1977-11-15 1977-11-15 Data storage processing system Pending JPS5469352A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13682477A JPS5469352A (en) 1977-11-15 1977-11-15 Data storage processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13682477A JPS5469352A (en) 1977-11-15 1977-11-15 Data storage processing system

Publications (1)

Publication Number Publication Date
JPS5469352A true JPS5469352A (en) 1979-06-04

Family

ID=15184356

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13682477A Pending JPS5469352A (en) 1977-11-15 1977-11-15 Data storage processing system

Country Status (1)

Country Link
JP (1) JPS5469352A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49102315A (en) * 1973-01-31 1974-09-27
JPS5040047A (en) * 1973-08-14 1975-04-12

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49102315A (en) * 1973-01-31 1974-09-27
JPS5040047A (en) * 1973-08-14 1975-04-12

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