JPS5484902A - Noise limiter for receiver - Google Patents

Noise limiter for receiver

Info

Publication number
JPS5484902A
JPS5484902A JP15318277A JP15318277A JPS5484902A JP S5484902 A JPS5484902 A JP S5484902A JP 15318277 A JP15318277 A JP 15318277A JP 15318277 A JP15318277 A JP 15318277A JP S5484902 A JPS5484902 A JP S5484902A
Authority
JP
Japan
Prior art keywords
gate
circuit
signal
noise
stero
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15318277A
Other languages
Japanese (ja)
Other versions
JPS5938779B2 (en
Inventor
Hitoshi Ukai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15318277A priority Critical patent/JPS5938779B2/en
Publication of JPS5484902A publication Critical patent/JPS5484902A/en
Publication of JPS5938779B2 publication Critical patent/JPS5938779B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Noise Elimination (AREA)
  • Stereo-Broadcasting Methods (AREA)

Abstract

PURPOSE: To eliminate the adverse effect due to gate operation to the stereo demodulation output with a simple circuit constitution, by holding the composite signal immediately before the gate operation of noise elimination in FM receivers.
CONSTITUTION: The stero signal from the FM detector 6 is fed to the delay circuit 10 and the pulsive noise detection circuit 8 via the amplifying circuit 7, the input of the detected signal of the circuit 8 to the control circuit 9 allows the pulse at the period rejecting pulsive noise to develop for the output and the gate 11 is controlled with this pulse. On the other hand, the delayed stereo signal and pulsive noise are inputted to the gate 11 and the composite signal immediately before the operation of the gate 11 stored in the circuit 12 at the gate off period is fed to the stero demodulator 14 via the amplifier 13.
COPYRIGHT: (C)1979,JPO&Japio
JP15318277A 1977-12-19 1977-12-19 Noise canceling device for receiver Expired JPS5938779B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15318277A JPS5938779B2 (en) 1977-12-19 1977-12-19 Noise canceling device for receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15318277A JPS5938779B2 (en) 1977-12-19 1977-12-19 Noise canceling device for receiver

Publications (2)

Publication Number Publication Date
JPS5484902A true JPS5484902A (en) 1979-07-06
JPS5938779B2 JPS5938779B2 (en) 1984-09-19

Family

ID=15556831

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15318277A Expired JPS5938779B2 (en) 1977-12-19 1977-12-19 Noise canceling device for receiver

Country Status (1)

Country Link
JP (1) JPS5938779B2 (en)

Also Published As

Publication number Publication date
JPS5938779B2 (en) 1984-09-19

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