JPS5494219A - Adaptive echo eraser - Google Patents
Adaptive echo eraserInfo
- Publication number
- JPS5494219A JPS5494219A JP127978A JP127978A JPS5494219A JP S5494219 A JPS5494219 A JP S5494219A JP 127978 A JP127978 A JP 127978A JP 127978 A JP127978 A JP 127978A JP S5494219 A JPS5494219 A JP S5494219A
- Authority
- JP
- Japan
- Prior art keywords
- gain correction
- digital filter
- signal
- fed
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000003044 adaptive effect Effects 0.000 title 1
- 230000005540 biological transmission Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/02—Details
- H04B3/20—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
- H04B3/23—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
PURPOSE:To suppress the accuracy of digital filter and tap gain correction circuit while obtaining the same echo erasing amount as conventional system, by applying noise when the echo path characteristics are measured and estimated. CONSTITUTION:The reception signal X from the terminal 1 and the transmission signal Y from the terminal 3 are fed to the A/D converter 5 and are converted into digital signals X' and Y'. X' is fed to the gain correction circuit 8 and the digital filter 9. The digital filter 9 synthesizes the approximate echo signal anti-Y from X'. The addition circuit 6 outputs the erase residual signal e by subtracting anti-Y from Y'. E is outputted from the terminal 4 after it is converted into analog signal with the D/A converter 7. Simultaneously, e is fed to the tap gain correction circuit 8 and forms the tap gain correction amount DELTAh of the digital filter 9 with X'. When noise N is added to DELTAh, it can be closer to e o
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP127978A JPS5494219A (en) | 1978-01-09 | 1978-01-09 | Adaptive echo eraser |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP127978A JPS5494219A (en) | 1978-01-09 | 1978-01-09 | Adaptive echo eraser |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5494219A true JPS5494219A (en) | 1979-07-25 |
| JPS6138659B2 JPS6138659B2 (en) | 1986-08-30 |
Family
ID=11497005
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP127978A Granted JPS5494219A (en) | 1978-01-09 | 1978-01-09 | Adaptive echo eraser |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5494219A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5912639A (en) * | 1982-07-12 | 1984-01-23 | Toshiba Corp | Echo canceler |
-
1978
- 1978-01-09 JP JP127978A patent/JPS5494219A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5912639A (en) * | 1982-07-12 | 1984-01-23 | Toshiba Corp | Echo canceler |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6138659B2 (en) | 1986-08-30 |
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