JPS5498134A - Input/output control system - Google Patents

Input/output control system

Info

Publication number
JPS5498134A
JPS5498134A JP430378A JP430378A JPS5498134A JP S5498134 A JPS5498134 A JP S5498134A JP 430378 A JP430378 A JP 430378A JP 430378 A JP430378 A JP 430378A JP S5498134 A JPS5498134 A JP S5498134A
Authority
JP
Japan
Prior art keywords
command
channel
general
contents
channel number
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP430378A
Other languages
Japanese (ja)
Inventor
Yukiro Shiraokawa
Tsutomu Sakamoto
Keizo Aoyanagi
Michio Arai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP430378A priority Critical patent/JPS5498134A/en
Publication of JPS5498134A publication Critical patent/JPS5498134A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To perform a flexible control for a peripheral device by I/O data, by setting a prescribed bit of the channel control word in the channel control block which has control information for the peripheral device.
CONSTITUTION: When a command read out from main memory 1 is decoded as a start I/O (SIO) command and the channel number is "0" on a basis of contents of general-purpose register R1 of the first operand, this command is interpreted as the I/O command for an operation processing unit itself; and when the channel number is not "0", contents of general-purpose registers R1 and R1+1 are sent onto a H bus. Assuming that the channel number is "1", a channel controller takes in information and controls the operation of one of I/O devices B#1 to B#n corresponding to the device number of general-purpose register R1.
COPYRIGHT: (C)1979,JPO&Japio
JP430378A 1978-01-20 1978-01-20 Input/output control system Pending JPS5498134A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP430378A JPS5498134A (en) 1978-01-20 1978-01-20 Input/output control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP430378A JPS5498134A (en) 1978-01-20 1978-01-20 Input/output control system

Publications (1)

Publication Number Publication Date
JPS5498134A true JPS5498134A (en) 1979-08-02

Family

ID=11580729

Family Applications (1)

Application Number Title Priority Date Filing Date
JP430378A Pending JPS5498134A (en) 1978-01-20 1978-01-20 Input/output control system

Country Status (1)

Country Link
JP (1) JPS5498134A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63238631A (en) * 1986-12-17 1988-10-04 インテル・コーポレーション Execution apparatus for i/o processor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63238631A (en) * 1986-12-17 1988-10-04 インテル・コーポレーション Execution apparatus for i/o processor

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