JPS5510221A - Picture processing system - Google Patents

Picture processing system

Info

Publication number
JPS5510221A
JPS5510221A JP8225078A JP8225078A JPS5510221A JP S5510221 A JPS5510221 A JP S5510221A JP 8225078 A JP8225078 A JP 8225078A JP 8225078 A JP8225078 A JP 8225078A JP S5510221 A JPS5510221 A JP S5510221A
Authority
JP
Japan
Prior art keywords
picture
density
picture element
processing system
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8225078A
Other languages
Japanese (ja)
Inventor
Morizumi Kurose
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP8225078A priority Critical patent/JPS5510221A/en
Publication of JPS5510221A publication Critical patent/JPS5510221A/en
Pending legal-status Critical Current

Links

Landscapes

  • Facsimile Image Signal Circuits (AREA)

Abstract

PURPOSE: To realize a picture processing system available for the high-density processing and reproduction of a multilevel picture by determining the density of a small picture element, forming one sampling picture element, by the algebraic mean of density between picture elements adjoining to the sampling picture element.
CONSTITUTION: To judge picture element S surrounded with picture elements A, B, C, and D in contact with four straight lines, the input picture S is outputted by dividing into four small picture elements α=(A+B)/2, β=(B+C)/2, γ=(C+ D)/2 and δ=(D+A)/2. For the purpose, input buffer register 21, after being stored with input data signals obtained in time sequence according to the scan on the picture, sends pieces of data A, B, C and D out and adder group 22 and multiplier group 23 compute (A+B)/2, (B+C)/2, (C+D)/2, and (D+A)/2. Then, multiplexers 24, 25 and 27 and shift register 26 send data G0 out in the order of (α), (δ), (β) and (γ).
COPYRIGHT: (C)1980,JPO&Japio
JP8225078A 1978-07-06 1978-07-06 Picture processing system Pending JPS5510221A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8225078A JPS5510221A (en) 1978-07-06 1978-07-06 Picture processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8225078A JPS5510221A (en) 1978-07-06 1978-07-06 Picture processing system

Publications (1)

Publication Number Publication Date
JPS5510221A true JPS5510221A (en) 1980-01-24

Family

ID=13769178

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8225078A Pending JPS5510221A (en) 1978-07-06 1978-07-06 Picture processing system

Country Status (1)

Country Link
JP (1) JPS5510221A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4971188A (en) * 1972-11-17 1974-07-10

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4971188A (en) * 1972-11-17 1974-07-10

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