JPS55110420A - Automatic equalizer - Google Patents
Automatic equalizerInfo
- Publication number
- JPS55110420A JPS55110420A JP1821479A JP1821479A JPS55110420A JP S55110420 A JPS55110420 A JP S55110420A JP 1821479 A JP1821479 A JP 1821479A JP 1821479 A JP1821479 A JP 1821479A JP S55110420 A JPS55110420 A JP S55110420A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- test signal
- fed
- signal
- input terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000006866 deterioration Effects 0.000 abstract 2
- 238000005070 sampling Methods 0.000 abstract 2
- 238000001514 detection method Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H15/00—Transversal filters
Landscapes
- Filters That Use Time-Delay Elements (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
PURPOSE:To enable to prevent remarkable deterioration in video quality, by discriminating it as over-equalization if the test signal at the sampling point exceeds a given level range and outputting the main signal via the bypass circuit through driving the selection relay circuit with the test signal. CONSTITUTION:In the automatic equalizer providing the selection circuit 23 and the over-equalizing detection circuit 21, the circuit 23 consists of the branch circuit 25, bypass circuit 24 and selective relay circuit 26. Further, the main signal fed to the terminal 1 is divided into two at the circuit 25, one is fed to one input terminal of the relay circuit 26 via the circuit 24, and another is fed to the input terminal of the tapped delay line 3, the output of the adder 8 is fed to another input terminal of the circuit 26, and the main signal is outputted from the terminal 2. On the other hand, the circuit 21 always monitors the test signal superimposed during the vertical blanking period of color TV signal, and judges it as over-equalization if the test signal at the sampling point exceeds a given level range, the circuit 26 is driven with the test signal, the main signal is outputted via the circuit 24 to prevent remarkable video deterioration.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1821479A JPS55110420A (en) | 1979-02-19 | 1979-02-19 | Automatic equalizer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1821479A JPS55110420A (en) | 1979-02-19 | 1979-02-19 | Automatic equalizer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS55110420A true JPS55110420A (en) | 1980-08-25 |
Family
ID=11965389
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1821479A Pending JPS55110420A (en) | 1979-02-19 | 1979-02-19 | Automatic equalizer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS55110420A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57129015A (en) * | 1981-02-04 | 1982-08-10 | Nippon Telegr & Teleph Corp <Ntt> | Automatic waveform equalizing device |
-
1979
- 1979-02-19 JP JP1821479A patent/JPS55110420A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57129015A (en) * | 1981-02-04 | 1982-08-10 | Nippon Telegr & Teleph Corp <Ntt> | Automatic waveform equalizing device |
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