JPS55127773A - Switching unit - Google Patents

Switching unit

Info

Publication number
JPS55127773A
JPS55127773A JP3587179A JP3587179A JPS55127773A JP S55127773 A JPS55127773 A JP S55127773A JP 3587179 A JP3587179 A JP 3587179A JP 3587179 A JP3587179 A JP 3587179A JP S55127773 A JPS55127773 A JP S55127773A
Authority
JP
Japan
Prior art keywords
transistors
amplifying
switching
gain
consequently
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3587179A
Other languages
Japanese (ja)
Inventor
Haruyasu Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP3587179A priority Critical patent/JPS55127773A/en
Publication of JPS55127773A publication Critical patent/JPS55127773A/en
Pending legal-status Critical Current

Links

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  • Television Receiver Circuits (AREA)
  • Stereo-Broadcasting Methods (AREA)

Abstract

PURPOSE: To eliminate noise at a switching time by connecting a switching transistor to the emitter of an amplifying transistor through a resistance to lower the gain of differential amplifiers which are constituted by these two transistors.
CONSTITUTION: In case that the first control signal VS1 is "L" and the second control signal VS2 is "H", the first and the second switching transistors 34 and 35 are turned off and on respectively, and the first and the second amplifying transistors 23 and 24 are in the amplification operation and the cut-off state respectively. Consequently, an output corresponding to input signal Vin1 is obtained as output V0. Next, if VS1 and VS2 are inverted gradually and the gain of differential amplifiers is small, collector currents of the first and the second amplifying transistors 23 and 24 are changed gradually. Consequently, output voltage V0 determined by the sum of these collector currents is hardly changed, so that noise may be prevented from being generated.
COPYRIGHT: (C)1980,JPO&Japio
JP3587179A 1979-03-26 1979-03-26 Switching unit Pending JPS55127773A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3587179A JPS55127773A (en) 1979-03-26 1979-03-26 Switching unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3587179A JPS55127773A (en) 1979-03-26 1979-03-26 Switching unit

Publications (1)

Publication Number Publication Date
JPS55127773A true JPS55127773A (en) 1980-10-02

Family

ID=12454049

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3587179A Pending JPS55127773A (en) 1979-03-26 1979-03-26 Switching unit

Country Status (1)

Country Link
JP (1) JPS55127773A (en)

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