JPS55140261A - Substrate potential generator - Google Patents
Substrate potential generatorInfo
- Publication number
- JPS55140261A JPS55140261A JP4860279A JP4860279A JPS55140261A JP S55140261 A JPS55140261 A JP S55140261A JP 4860279 A JP4860279 A JP 4860279A JP 4860279 A JP4860279 A JP 4860279A JP S55140261 A JPS55140261 A JP S55140261A
- Authority
- JP
- Japan
- Prior art keywords
- polycrystalline silicon
- substrate
- type
- diffused
- coated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/211—Design considerations for internal polarisation
- H10D89/213—Design considerations for internal polarisation in field-effect devices
- H10D89/215—Design considerations for internal polarisation in field-effect devices comprising arrangements for charge pumping or biasing substrates
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Abstract
PURPOSE:To reduce the erronenous operation of a dynamic circuit by forming a rectifying MOSFET used for a substrate potential generator integrated on the same substrate as a dynamic memory circuit with polycrystalline silicon isolated form the substrate as a channel. CONSTITUTION:Two n<+>-type regions 202 are diffused in a p<->-type silicon substrate 201, a shallow n<+>-type region 226 is formed therebetween, a gate electrode 213 such as polycrystalline silicon or the like is coated through a gate oxide film 210 on the region 226, and a MOS capacitor 206 is formed thereat. An SiO2 film 231 is coated on the position adjacent to the condenser 206 of the substrate 201, a p-type polycrystalline silicon layer 232 is accumulated on the surface, three n<+>-type polycrystalline silicon layers 203, 204, 205 are diffused to become source and drain thereon, and the layer 232 is used for the channel regions of the rectifying MOSFET 207 and 208. That is, gate oxide films 211, 212 of the FET207, 208 and gate electrodes 214, 215 of polycrystalline silicon or the like are formed on the two channels.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4860279A JPS55140261A (en) | 1979-04-19 | 1979-04-19 | Substrate potential generator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4860279A JPS55140261A (en) | 1979-04-19 | 1979-04-19 | Substrate potential generator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS55140261A true JPS55140261A (en) | 1980-11-01 |
| JPS6244693B2 JPS6244693B2 (en) | 1987-09-22 |
Family
ID=12807947
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4860279A Granted JPS55140261A (en) | 1979-04-19 | 1979-04-19 | Substrate potential generator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS55140261A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62229866A (en) * | 1985-11-29 | 1987-10-08 | Nippon Denso Co Ltd | Semiconductor device |
| US4907047A (en) * | 1985-08-09 | 1990-03-06 | Nec Corporation | Semiconductor memory device |
-
1979
- 1979-04-19 JP JP4860279A patent/JPS55140261A/en active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4907047A (en) * | 1985-08-09 | 1990-03-06 | Nec Corporation | Semiconductor memory device |
| JPS62229866A (en) * | 1985-11-29 | 1987-10-08 | Nippon Denso Co Ltd | Semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6244693B2 (en) | 1987-09-22 |
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