JPS55140331A - Semiconductor integrated circuit - Google Patents
Semiconductor integrated circuitInfo
- Publication number
- JPS55140331A JPS55140331A JP4932579A JP4932579A JPS55140331A JP S55140331 A JPS55140331 A JP S55140331A JP 4932579 A JP4932579 A JP 4932579A JP 4932579 A JP4932579 A JP 4932579A JP S55140331 A JPS55140331 A JP S55140331A
- Authority
- JP
- Japan
- Prior art keywords
- array
- inverters
- constitution
- integrated circuit
- semiconductor integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title 1
- 230000001419 dependent effect Effects 0.000 abstract 1
- 230000003071 parasitic effect Effects 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
- H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To obtain a high-speed programmable logic array by connecting a part, at least, of ouput lines of the AND array to the second array through inverters respectively. CONSTITUTION:Inputs I1-Il are input to the first AND array A1, and AND array lines A1-Am are input to the second AND array A2 (A1'-Am') through inverters N1-Nm, and outputs O1'-On' becomes outputs O1-On through inverters. Therefore, the output becomes equivalent to the OR array practically, and the circuit can be handled similarly to the PLA of AND-OR constitution, and then, parasitic capacity CS to the substrate becomes very small even for one inverter, and delay of delay time tpd dependent upon capacity CS is improved considerably to eliminate almost irregularity of time tpd.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4932579A JPS55140331A (en) | 1979-04-20 | 1979-04-20 | Semiconductor integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4932579A JPS55140331A (en) | 1979-04-20 | 1979-04-20 | Semiconductor integrated circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS55140331A true JPS55140331A (en) | 1980-11-01 |
| JPS6210450B2 JPS6210450B2 (en) | 1987-03-06 |
Family
ID=12827821
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4932579A Granted JPS55140331A (en) | 1979-04-20 | 1979-04-20 | Semiconductor integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS55140331A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS594329A (en) * | 1982-06-15 | 1984-01-11 | インタ−ナシヨナル ビジネス マシ−ンズ コ−ポレ−シヨン | Logic circuit using pla |
-
1979
- 1979-04-20 JP JP4932579A patent/JPS55140331A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS594329A (en) * | 1982-06-15 | 1984-01-11 | インタ−ナシヨナル ビジネス マシ−ンズ コ−ポレ−シヨン | Logic circuit using pla |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6210450B2 (en) | 1987-03-06 |
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