JPS5520054A - Differential amplifier - Google Patents

Differential amplifier

Info

Publication number
JPS5520054A
JPS5520054A JP9293078A JP9293078A JPS5520054A JP S5520054 A JPS5520054 A JP S5520054A JP 9293078 A JP9293078 A JP 9293078A JP 9293078 A JP9293078 A JP 9293078A JP S5520054 A JPS5520054 A JP S5520054A
Authority
JP
Japan
Prior art keywords
terminal
input
terminals
inverted
constitution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9293078A
Other languages
Japanese (ja)
Other versions
JPS593882B2 (en
Inventor
Akiyoshi Hatada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP53092930A priority Critical patent/JPS593882B2/en
Publication of JPS5520054A publication Critical patent/JPS5520054A/en
Publication of JPS593882B2 publication Critical patent/JPS593882B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)
  • Manipulation Of Pulses (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To increase the response velocity in case the input is inverted for the differential amplifier comprising IGFET, by stopping the operation prior to the input inversion and also charging previously the floating capacity to a high level. CONSTITUTION:FET13 is connected between positive power terminal 1 and 1st output terminal 9, and at the same time FET14 is connected between terminal 1 and 2nd output terminal 10. Then these gates are connected to draw out 1st control terminal 15. Also FET3 is connected between terminals 1 and 9, and 1st input terminal 7 is provided to the gate. At the same time, FET5 is connected between terminals 1 and 10 to provide 2nd input terminal 8. Then FETS4 and 17 are connected between terminal 9 and earth terminal 2, and 2nd control terminal 18 is provided to the gate of EFT17 along with FET6 connected between terminal 10 and FET17. In such constitution of the circuit, the high and low level potential are supplied to terminals 15 and 18 each to stop the function of the amplifier, and floating capacities 11 and 12 are changed to a high level. After this, these levels are inverted to obtain the differential output free from the time delay.
JP53092930A 1978-07-28 1978-07-28 differential amplifier Expired JPS593882B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53092930A JPS593882B2 (en) 1978-07-28 1978-07-28 differential amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53092930A JPS593882B2 (en) 1978-07-28 1978-07-28 differential amplifier

Publications (2)

Publication Number Publication Date
JPS5520054A true JPS5520054A (en) 1980-02-13
JPS593882B2 JPS593882B2 (en) 1984-01-26

Family

ID=14068206

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53092930A Expired JPS593882B2 (en) 1978-07-28 1978-07-28 differential amplifier

Country Status (1)

Country Link
JP (1) JPS593882B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56126316A (en) * 1980-03-10 1981-10-03 Nec Corp Mos comparing integrated circuit
JPS5793722A (en) * 1980-12-03 1982-06-10 Toshiba Corp Integrated circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56126316A (en) * 1980-03-10 1981-10-03 Nec Corp Mos comparing integrated circuit
JPS5793722A (en) * 1980-12-03 1982-06-10 Toshiba Corp Integrated circuit

Also Published As

Publication number Publication date
JPS593882B2 (en) 1984-01-26

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