JPS5525852A - Automatic adjuster circuit for reading pulse phase - Google Patents
Automatic adjuster circuit for reading pulse phaseInfo
- Publication number
- JPS5525852A JPS5525852A JP9837778A JP9837778A JPS5525852A JP S5525852 A JPS5525852 A JP S5525852A JP 9837778 A JP9837778 A JP 9837778A JP 9837778 A JP9837778 A JP 9837778A JP S5525852 A JPS5525852 A JP S5525852A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output
- phase
- reading pulse
- optimum phase
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 abstract 2
Landscapes
- Signal Processing For Digital Recording And Reproducing (AREA)
Abstract
PURPOSE: To secure an automatic adjustment of the reading pulse to the optimum phase by regarding the reading pulse phase featuring the munimum code error detecting frequency as the optimum phase.
CONSTITUTION: The error current value read out via reading address designation circuit 20 and memorized in memory circuit 11 is supplied sequentially to minumum value detection circuit 21, and only the minimum value is sent to reference error number setting circuit 22 to be added with a fixed number and then turned to the reference error number. The output of comparator 23 comparing the reference error number with the error count number holds the count value of counter circuit 24 relating phases corresponding to the fall and rise time at detection circuits 25 and 26 of the domain start and terminal each. In this connection, the output of differentiating circuit 27 and the differential inverse outlut of the comparison output are applied to circuits 25 and 26, and the output of the both circuits are supplied to phase setting circuit 28 via arithmetic mean calculatlation circuit 27 to be converted into the digital value of the control voltage corresponding to the optimum phase. As a result, an automatic adjustment is ensured for the reading pulse to the optimum phase.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9837778A JPS5525852A (en) | 1978-08-10 | 1978-08-10 | Automatic adjuster circuit for reading pulse phase |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9837778A JPS5525852A (en) | 1978-08-10 | 1978-08-10 | Automatic adjuster circuit for reading pulse phase |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5525852A true JPS5525852A (en) | 1980-02-23 |
| JPS6334545B2 JPS6334545B2 (en) | 1988-07-11 |
Family
ID=14218176
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9837778A Granted JPS5525852A (en) | 1978-08-10 | 1978-08-10 | Automatic adjuster circuit for reading pulse phase |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5525852A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58164011A (en) * | 1982-03-23 | 1983-09-28 | Hitachi Denshi Ltd | Automatic adjusting device of data discriminating phase |
| JPH01159873A (en) * | 1987-12-17 | 1989-06-22 | Pioneer Electron Corp | Method for recording and reproducing data |
-
1978
- 1978-08-10 JP JP9837778A patent/JPS5525852A/en active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58164011A (en) * | 1982-03-23 | 1983-09-28 | Hitachi Denshi Ltd | Automatic adjusting device of data discriminating phase |
| JPH01159873A (en) * | 1987-12-17 | 1989-06-22 | Pioneer Electron Corp | Method for recording and reproducing data |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6334545B2 (en) | 1988-07-11 |
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