JPS5530704A - Information processor - Google Patents

Abstract

PURPOSE: To reduce the time excepting the reading action of the memory device and thus to enhance the overall performance for the information processor by supplying the reading data given from the memory device to the address line by the command from the arithmetic unit and then giving the memory request again.

CONSTITUTION: The operand address is shown by the contents shown by address (a) of memory device 2 with the command given from arithmetic unit 1 and through the order system which gives the data transfer to the register from the memory device in the address indirect designation action. Unit 1 supplies address (a) to device 2 via address line 3 and then cancels the memory request even with reception of the reading end signal of contents (b) of device 2 shown by address (a). Reading data (b) on data line 4 is supplied to device 2 through switching gate 5. Here memory element array 6 corresponding to the new address is actuated to put on the new data on the data line. Thus contents (c) of the memory device shown by data (b), omitting the arithmetic time for the intermediate operation and then enhancing the overall performance of the processor.

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