JPS5530729A - Action career memory system for logic device - Google Patents

Action career memory system for logic device

Info

Publication number
JPS5530729A
JPS5530729A JP10262778A JP10262778A JPS5530729A JP S5530729 A JPS5530729 A JP S5530729A JP 10262778 A JP10262778 A JP 10262778A JP 10262778 A JP10262778 A JP 10262778A JP S5530729 A JPS5530729 A JP S5530729A
Authority
JP
Japan
Prior art keywords
circuit
information
output
phenomenon
delivered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10262778A
Other languages
Japanese (ja)
Inventor
Tadanobu Okuyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP10262778A priority Critical patent/JPS5530729A/en
Publication of JPS5530729A publication Critical patent/JPS5530729A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To secure collection of the information necessary for the error analysis in a simple constitution by memorizing sequentially both the input/output information and the state information sent from the logic device and then delivering selectively these information from the memory device after detecting that the expected working state has obtained.
CONSTITUTION: Input switch designation signal 104 is delivered from control circuit 5 by working level signal 101 sent from logic device 1, and the desired information is memorized in memory circuit 6 via input switch circuit 3 and register 4. Now if the phenomenon indicated previously, for example, an error occurs, phenomenon occurrence signal 100 is delivered from phenomenon detection circuit 2. And the phenomenon occurrence environment information is stored in register 4 from circuit 2. The environment information turns to output signal 113 of output switch circuit 9 under the control of circuit 5 and then delivered through output control circuit 12. After this, output of circuit 6 is selected at circuit 9 to turn to output line 113, and the information within desired n units of circuit 6 is delivered to output circuit 13 under the control of circuits 5 and 12. As a result, the state information preceding occurrence of the phenomenon can be obtained, thus facilitating the error analysis.
COPYRIGHT: (C)1980,JPO&Japio
JP10262778A 1978-08-22 1978-08-22 Action career memory system for logic device Pending JPS5530729A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10262778A JPS5530729A (en) 1978-08-22 1978-08-22 Action career memory system for logic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10262778A JPS5530729A (en) 1978-08-22 1978-08-22 Action career memory system for logic device

Publications (1)

Publication Number Publication Date
JPS5530729A true JPS5530729A (en) 1980-03-04

Family

ID=14332468

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10262778A Pending JPS5530729A (en) 1978-08-22 1978-08-22 Action career memory system for logic device

Country Status (1)

Country Link
JP (1) JPS5530729A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56127257A (en) * 1980-03-11 1981-10-05 Nec Corp State history storage device
JPS5810249A (en) * 1981-07-13 1983-01-20 Nec Corp Status career storage system
JPS5810247A (en) * 1981-07-13 1983-01-20 Nec Corp Status career storage system
JPS5810248A (en) * 1981-07-13 1983-01-20 Nec Corp Status career storage system
JPS58112147A (en) * 1981-12-25 1983-07-04 Fujitsu Ltd Automatic trace process controlling system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49114320A (en) * 1973-02-28 1974-10-31
JPS51135339A (en) * 1975-05-20 1976-11-24 Fujitsu Ltd Hysteresis holding control system in a logical equipment
JPS5230133A (en) * 1975-09-02 1977-03-07 Fujitsu Ltd Data collection and processing system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49114320A (en) * 1973-02-28 1974-10-31
JPS51135339A (en) * 1975-05-20 1976-11-24 Fujitsu Ltd Hysteresis holding control system in a logical equipment
JPS5230133A (en) * 1975-09-02 1977-03-07 Fujitsu Ltd Data collection and processing system

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56127257A (en) * 1980-03-11 1981-10-05 Nec Corp State history storage device
JPS5810249A (en) * 1981-07-13 1983-01-20 Nec Corp Status career storage system
JPS5810247A (en) * 1981-07-13 1983-01-20 Nec Corp Status career storage system
JPS5810248A (en) * 1981-07-13 1983-01-20 Nec Corp Status career storage system
JPS58112147A (en) * 1981-12-25 1983-07-04 Fujitsu Ltd Automatic trace process controlling system

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