JPS5531322A - Rising system for system - Google Patents

Rising system for system

Info

Publication number
JPS5531322A
JPS5531322A JP10445478A JP10445478A JPS5531322A JP S5531322 A JPS5531322 A JP S5531322A JP 10445478 A JP10445478 A JP 10445478A JP 10445478 A JP10445478 A JP 10445478A JP S5531322 A JPS5531322 A JP S5531322A
Authority
JP
Japan
Prior art keywords
mcp
program
transfer
rising
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10445478A
Other languages
Japanese (ja)
Other versions
JPS5722509B2 (en
Inventor
Shigeo Morita
Takeshi Kawasaki
Hiroyuki Katou
Keisuke Okajima
Kenji Seike
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Oki Electric Industry Co Ltd
NTT Inc
Original Assignee
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP10445478A priority Critical patent/JPS5531322A/en
Publication of JPS5531322A publication Critical patent/JPS5531322A/en
Publication of JPS5722509B2 publication Critical patent/JPS5722509B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored program
    • H04Q3/54541—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored program using multi-processor systems
    • H04Q3/5455—Multi-processor, parallelism, distributed systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To give a quick and well-ordered rising to the electronic exchange system of multi-processor system without causing any confusion as a system by giving the wake-up to the processors and memories in sequence based on the specified processor among the central processors. CONSTITUTION:At the opening time of the station, all programs, data and the like which are used within the system are transferred from the file memory (FM) to the bubble memory (MB) under the control of MCP(CPN+1, CPN+2) which is a specified processor. Then the MCP starts the fault process circuit (FPC). The FPC gives a command to the MCP to transfer the system rising program to the local memory (IM) of the MCP from the MB. After this, the MCP makes the program within the IM run to transfer the program and the data to be supplied to the IM of each CP from the MB to the common memory (CM). Furthermore, the MCP starts the mu-program of each CP and then makes each CP transfer the infromation within CM to the IM of its own. The MCP has the same behavior also to the peripheral control unit NP.
JP10445478A 1978-08-29 1978-08-29 Rising system for system Granted JPS5531322A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10445478A JPS5531322A (en) 1978-08-29 1978-08-29 Rising system for system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10445478A JPS5531322A (en) 1978-08-29 1978-08-29 Rising system for system

Publications (2)

Publication Number Publication Date
JPS5531322A true JPS5531322A (en) 1980-03-05
JPS5722509B2 JPS5722509B2 (en) 1982-05-13

Family

ID=14381055

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10445478A Granted JPS5531322A (en) 1978-08-29 1978-08-29 Rising system for system

Country Status (1)

Country Link
JP (1) JPS5531322A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58158759A (en) * 1982-03-16 1983-09-21 Nec Corp Information processing device
JPH03270492A (en) * 1990-03-20 1991-12-02 Nec Corp Load/function dividing type exchange control system

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6041617U (en) * 1983-08-30 1985-03-23 来栖　昭佳 Telescopic pole for hanger

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58158759A (en) * 1982-03-16 1983-09-21 Nec Corp Information processing device
JPH03270492A (en) * 1990-03-20 1991-12-02 Nec Corp Load/function dividing type exchange control system

Also Published As

Publication number Publication date
JPS5722509B2 (en) 1982-05-13

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