JPS5532109A - Data transfer system - Google Patents

Data transfer system

Info

Publication number
JPS5532109A
JPS5532109A JP10451778A JP10451778A JPS5532109A JP S5532109 A JPS5532109 A JP S5532109A JP 10451778 A JP10451778 A JP 10451778A JP 10451778 A JP10451778 A JP 10451778A JP S5532109 A JPS5532109 A JP S5532109A
Authority
JP
Japan
Prior art keywords
data
write data
read data
write
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10451778A
Other languages
Japanese (ja)
Inventor
Shozo Taniguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10451778A priority Critical patent/JPS5532109A/en
Publication of JPS5532109A publication Critical patent/JPS5532109A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To transfer write data and read data by means of the same bus and yet to prevent the interference of both data by setting the transferring times for the write data and read data alternately in the memory.
CONSTITUTION: Transfer of write data and read data between memory module 30, which consists of the memory element group, write register and read register, and external control circuit 1, which controls transfer of the write data and read data to memory module 30, is carried out by means of the same bus RWBO. The time for transferring write data and the time for transferring read data are set alternately to the clock with a stated period and yet the system is controlled so that the write data and read data do not interferes each other on bus RWBO.
COPYRIGHT: (C)1980,JPO&Japio
JP10451778A 1978-08-28 1978-08-28 Data transfer system Pending JPS5532109A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10451778A JPS5532109A (en) 1978-08-28 1978-08-28 Data transfer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10451778A JPS5532109A (en) 1978-08-28 1978-08-28 Data transfer system

Publications (1)

Publication Number Publication Date
JPS5532109A true JPS5532109A (en) 1980-03-06

Family

ID=14382677

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10451778A Pending JPS5532109A (en) 1978-08-28 1978-08-28 Data transfer system

Country Status (1)

Country Link
JP (1) JPS5532109A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02272264A (en) * 1989-04-11 1990-11-07 Ebara Corp Electric motor for vapor compression type heat pump

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02272264A (en) * 1989-04-11 1990-11-07 Ebara Corp Electric motor for vapor compression type heat pump

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